Quoting the International Technology Roadmap for Semiconductors (ITRS) 2009 Emerging Research Devices section, 'Nanomagnetic logic (NML) has potential advantages relative to CMOS of being non-volatile, dense, low-power, and radiation-hard. Such magnetic elements are compatible with MRAM technology, which can provide input–output interfaces. Compatibility with MRAM also promises a natural integration of memory and logic. Nanomagnetic logic also appears to be scalable to the ultimate limit of using individual atomic spins.' This article reviews progress toward complete and reliable NML systems. More specifically, we (i) review experimental progress toward fundamental characteristics a device must possess if it is to be used in a digital system, (ii) consider how the NML design space may impact the system-level energy (especially when considering the clock needed to drive a computation), (iii) explain--using both the NML design space and a discussion of clocking as context—how reliable circuit operation may be achieved, (iv) highlight experimental efforts regarding CMOS friendly clock structures for NML systems, (v) explain how electrical I/O could be achieved, and (vi) conclude with a brief discussion of suitable architectures for this technology. Throughout the article, we attempt to identify important areas for future work.

No abstract

We discuss the experimental demonstration of non-majority, two-input, nanomagnet logic (NML) AND and OR gates. While gate designs still can incorporate the symmetric, rounded-rectangle magnets used in the three-input majority gate experiments by Imre (2006 Science 311 205-8), our new designs also leverage magnets with an edge that has a well-defined 'slant'. In rectangular and ellipsoid nanomagnets, the easy axis of the device coincides with its longer edge. For a magnet with a slanted edge, the easy and hard axes are 'tilted', and magnetic fields applied along the (geometrical) hard axis alone can set the easy axis magnetization state. This switching phenomenon can be employed to realize NML Boolean logic gates with both reduced footprints and critical path delays. Experimental demonstrations of two-input AND and OR gates are supported by corresponding micromagnetic simulations with temperature effects associated with a 300 K environment. Simulations suggest that the time evolution of experimentally demonstrated structures is correct, and that designs can also tolerate clock field misalignment. Additionally, simulations suggest that a slanted-edge 'compute magnet' can (i) be driven by two anti-ferromagnetically ordered lines of NML devices (for input) and (ii) drive an anti-ferromagnetically ordered line (for output). Both are essential if slanted-edge devices are to be used in NML circuits. We conclude with a discussion of extensibility and scaling prospects for shape-based computation with nanomagnets.

No abstract

No abstract