We demonstrate a method by which few-layer graphene samples can be etched along crystallographic axes by thermally activated metallic nanoparticles. The technique results in long (>1 µm) crystallographic edges etched through to the insulating substrate, making the process potentially useful for atomically precise graphene device fabrication. This advance could enable atomically precise construction of integrated circuits from single graphene sheets with a wide range of technological applications.Due to its remarkable electronic properties, few layer graphene is emerging as a promising new material for use in a vast array of postsilicon nanoelectronic devices incorporating quantum size effects.1,2 Of particular interest would be the construction of atomically precise graphene nanoribbons, in which charge carriers are confined in the lateral dimension whereby the electronic properties are controlled by the width and specific crystallographic orientation of the ribbon.3−14 Such structures hold enormous promise as nanoscale devices similar to those recently developed using carbon nanotubes 2,11,15 with the added advantage that graphenes two-dimensionality lends itself to existing device architectures based on planar geometries.However, these structures have so far been impossible to achieve because of the rough noncrystalline edges of the graphene that result from current state-of-the-art nanolithography techniques.2,16,17 These rough edges are thought to be the crucial limiting factor to attaining useful performance and on/off current ratios from nanoscale graphene devices. 13,18,19 As a step toward band gap engineering of this material, we have developed a means by which fewlayer graphene (FLG) samples can be etched along crystallographic axes by thermally activated metallic nanoparticles. 20 The technique results in long (>1 µm) trenches commensurate with the crystal lattice that are etched through to the supporting insulating substrate, making the process potentially useful for atomically precise graphene device fabrication, as well as indicating a possible method by which entire circuits could be carved out from single graphene sheets. Our initial samples (before etching) consisted of pristine few-layer graphene sheets transferred onto highly doped Si substrates with 300 nm thermally grown SiO 2 by mechanical exfoliation under ambient conditions, similar to the technique described in ref 21. Flakes of few-layer graphene are identified using optical microscopy. Height imaging of our samples is done using a Veeco Dimension 3100 atomic force microscope (AFM) operating in intermittent contact mode, with Si 3 N 4 -coated tips (NSC15, Mikromasch) of curvature * E-mail: drstrach@sas.upenn.edu † E-mail: cjohnson@physics.upenn.edu 1 radius ≤ 20 nm. Samples are also characterized using a JEOL JSM6400 scanning electron microscope (with a LaB 6 filament).The FLG on SiO 2 /Si substrates are uniformly spin-coated with ∼15 mL solution of 50 mg/L Fe(NO 3 ) 3 ·9H 2 O in isopropyl alcohol (HPLC grade). The samples are th...
Graphene-derived nanomaterials are emerging as ideal candidates for postsilicon electronics. Elucidating the electronic interaction between an insulating substrate and few-layer graphene (FLG) films is crucial for device applications. Here, we report electrostatic force microscopy (EFM) measurements revealing that the FLG surface potential increases with film thickness, approaching a "bulk" value for samples with five or more graphene layers. This behavior is in sharp contrast with that expected for conventional conducting or semiconducting films, and derives from unique aspects of charge screening by graphene's relativistic low energy carriers. EFM measurements resolve previously unseen electronic perturbations extended along crystallographic directions of structurally disordered FLGs, likely resulting from long-range atomic defects. These results have important implications for graphene nanoelectronics and provide a powerful framework by which key properties can be further investigated.
We have developed a controlled and highly reproducible method of making nanometer-spaced electrodes using electromigration in ambient lab conditions. This advance will make feasible single molecule measurements of macromolecules with tertiary and quaternary structures that do not survive the liquid-helium temperatures at which electromigration is typically performed. A second advance is that it yields gaps of desired tunnelling resistance, as opposed to the random formation at liquid-helium temperatures. Nanogap formation occurs through three regimes: First it evolves through a bulk-neck regime where electromigration is triggered at constant temperature, then to a few-atom regime characterized by conductance quantum plateaus and jumps, and finally to a tunnelling regime across the nanogap once the conductance falls below the conductance quantum.Electromigration has recently been successfully employed to make nanometer-spaced electrodes for single molecule devices [1,2,3,4]. The typical procedure entails an abrupt break at liquid-helium temperatures that yields a nanogap with a random tunnelling resistance [4,5,6,7,8]. However, this procedure makes gaps at room temperature which are typically too large for molecular measurements [6]. This hinders the application of the typical electromigration procedure to molecules which do not survive a sub-freezing environment, such as macromolecules that feature modest thermodynamic stability of their respective tertiary and quaternary structures.We have developed an electromigration procedure that is completely performed in ambient laboratory conditions and yields a controllable nanogap resistance to within a factor of about three of the target value in the 0.5 MΩ to 1 TΩ range. The electromigration procedure evolves through three regimes. At large conductance (G), local heating increases Au mobility and triggers electromigration in the metallic neck at a critical temperature. When the neck narrows to the few-atom regime it shows jumps and plateaus near multiples of the conductance quantum (G o = 2e 2 /h) and a sharp decrease in the critical temperature. A tunnelling regime is entered once G falls below G o accompanied by formation of a nanogap.We first fabricate two overlapping Au leads (each 8-30 nm thick) using electron-beam lithography and doubleangle evaporation of Au (Fig. 1a). An initial 3 nm thick Cr layer (deposited normal to surface) helps the contact * Electronic Address: drstrach@sas.upenn.edu † Electronic Address: cjohnson@physics.upenn.edu FIG. 1: (a) Field-emission SEM micrograph of electrodes before electromigration. (b) Nanogap after electromigration.pads adhere to the SiO 2 substrate while a final 40 nm thick layer of Au on the contacts reduces the resistance to between 100-200 Ω at room temperature. At room temperature and atmospheric pressure, we perform controlled electromigration with a succession of voltage (V ) ramps while monitoring the current (I) and conductance of the leads (Fig. 2). We make an initial measurement of G and compare this to later mea...
Electromigrated nanogaps have shown great promise for use in molecular scale electronics. We have fabricated nanogaps on free-standing transparent SiN(x) membranes which permit the use of transmission electron microscopy (TEM) to image the gaps. The electrodes are formed by extending a recently developed controlled electromigration procedure and yield a nanogap with approximately 5 nm separation clear of any apparent debris. The gaps are stable, on the order of hours as measured by TEM, but over time (months) relax to about 20 nm separation determined by the surface energy of the Au electrodes. A major benefit of electromigrated nanogaps on SiN(x) membranes is that the junction pinches in away from residual metal left from the Au deposition which could act as a parasitic conductance path. This work has implications to the design of clean metallic electrodes for use in nanoscale devices where the precise geometry of the electrode is important.
We have developed a technique for simultaneously fabricating large numbers of nanogaps in a single processing step using feedback-controlled electromigration. Parallel nanogap formation is achieved by a balanced simultaneous process that uses a novel arrangement of nanoscale shorts between narrow constrictions where the nanogaps form. Because of this balancing, the fabrication of multiple nanoelectrodes is similar to that of a single nanogap junction. The technique should be useful for constructing complex circuits of molecular-scale electronic devices.
A method is reported to pattern monolayer graphene nanoconstriction field-effect transistors (NCFETs) with critical dimensions below 10 nm. NCFET fabrication is enabled by the use of feedback-controlled electromigration (FCE) to form a constriction in a gold etch mask that is first patterned using conventional lithographic techniques. The use of FCE allows the etch mask to be patterned on size scales below the limit of conventional nanolithography. The opening of a confinement-induced energy gap is observed as the NCFET width is reduced, as evidenced by a sharp increase in the NCFET on/off ratio. The on/off ratios obtained with this procedure can be larger than 1000 at room temperature for the narrowest devices; this is the first report of such large room-temperature on/off ratios for patterned graphene FETs.
Enhancements in the performance of organic–inorganic nanocomposite thermoelectrics may be obtained with both small and large energy barriers at the organic–inorganic interfaces.
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