Two-dimensional materials have been widely investigated to implement memristive devices for data storage or neuromorphic computing applications because of their ultra-scaled thicknesses and clean interfaces. For example, resistance switching in hexagonal boron nitride (h-BN) has been demonstrated. This mechanism is most of the time attributed to the movement of metallic ions. It has however also been reported when h-BN is contacted with two inert electrodes such as graphene or Pt. We suggest here that the switching mechanism of the latter devices, which has not yet been clearly established, relies on locals change of the electronic structure of h-BN as caused by atomic defects, e.g., multi-vacancies. This class of intrinsic h-BN defects can create electrically controllable interlayer bridges. We use a combination of hybrid density functional theory and the Non-equilibrium Green’s function formalism to show that a single interlayer bridge resulting from the presence of a trivacancy in a graphene/h-BN/graphene stack leads to a switching voltage of ~5 V and a high-to-low resistance ratio >100. Both values lie within the reported experimental range and thus confirm the likelihood that intrinsic defects play a key role in the resistance switching of h-BN in contact with inert electrodes.

Within the last decade, considerable efforts have been devoted to fabricating transistors utilizing 2D semiconductors. Also, small circuits consisting of a few transistors have been demonstrated, including inverters, ring oscillators, and static random access memory cells. However, for industrial applications, both time‐zero and time‐dependent variability in the performance of the transistors appear critical. While time‐zero variability is primarily related to immature processing, time‐dependent drifts are dominated by charge trapping at defects located at the channel/insulator interface and in the insulator itself, which can substantially degrade the stability of circuits. At the current state of the art, 2D transistors typically exhibit a few orders of magnitude higher trap densities than silicon devices, which considerably increases their time‐dependent variability, resulting in stability and yield issues. Here, the stability of currently available 2D electronics is carefully evaluated using circuit simulations to determine the impact of transistor‐related issues on the overall circuit performance. The results suggest that while the performance parameters of transistors based on certain material combinations are already getting close to being competitive with Si technologies, a reduction in variability and defect densities is required. Overall, the criteria for parameter variability serve as guidance for evaluating the future development of 2D technologies.

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