We have developed a 1.29~12 full CMOS SRAM cell for low power applications, which is the world-smallest one by using 0 . 1 2~1 single gate CMOS technology and optical enhancement techniques for extending use of 248nm KrF lithography. It includes 1) 0.28um pitch contacts formed by aerial image controlled patterns on phase shift mask (PSM) and photo resist flow, 2) gate patterns with 0.24um pitch, 3) 0 . 1 3~ buried channel PMOS, and 4) spacer-on-stopper (SOS) MOSFET structure for expanding contact area and reducing band-to-band tunneling leakage.
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