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A double patterning (DP) process is discussed for 50nm half pitch interconnects, using a litho-etch-litho-etch approach on metal hard mask (MHM). Since an 0.85NA immersion scanner is used, the small pitch of 100nm is obtained by DP, the small trenches are made by a Quasar exposure followed by a shrink technique. The RELACS ® process is used, realizing narrow trenches with larger DOF and less LER. For mask making, a design split is carried out, followed by adjustments of the basic design to make the patterns more litho-friendly. Assist features are placed next to isolated trenches to ensure sufficient DOF. Furthermore, an adjusted OPC calculation is carried out, taking into account proximity effects of both the exposure and the subsequent shrink process. After mask fabrication, this DP process is used for a single damascene application, with BDIIx as low-k material and TaN or TiN as MHM. Various problems are encountered, such as CD gain of the trenches during both MHM etch steps, poisoning and BARC thickness variations due to topography during the second litho step. For all these problems, solutions or work-arounds have been found, After the second MHM-etch, the 50nm half-pitch pattern is transferred successfully in the underlying low-k material.

Single damascene (SD) Cu/Aurora ® ULK interconnects with a minimum spacing of 50nm are achieved by using a metal hard mask (MHM) integration scheme, which enables to perform the resist ash before dielectric etch. This patterning scheme is used in combination with a low damage etch technique based on sidewall protection. Interconnect performance and reliability can be further improved by using Aurora ® ULK High Modulus (HM), a low-k film with a reduced diffusivity as compared to Aurora ULK, and a comparable k-value of 2.7. The MHM approach results in a limited increase in integrated k-value by 0.

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