Interconnect properties position superconducting digital circuits to build large, high performance, power efficient digital systems. We report a board-to-board communication data link, which is a critical technological component that has not yet been addressed. Synchronous communication on chip and between chips mounted on a common board is enabled by the superconducting resonant clock/power network for Reciprocal Quantum Logic circuits. The data link is extended to board-to-board communication using isochronous communication, where there is a common frequency between boards but the relative phase is unknown. Our link uses over-sampling and configurable delay at the receiver to synchronize to the local clock phase. A single-bit isochronous data link has been demonstrated on- chip through a transmission line, and on a multi-chip module through a superconducting tape between driver and receiver with variable phase offset. Measured results demonstrated correct functionality with a clock margin of 3 dB at 3.6 GHz, and with 5 fJ/bit at 4.2 K.

For high-volume production of 3D-stacked chips with through-silicon-vias (TSVs), wafer-scale bonding offers lower production cost compared with bump bond technology and is promising for interconnect pitches smaller than 5 µ using available tooling. Prior work has presented wafer-scale integration with tungsten TSV for low-power applications.

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