In modeling and simulation tools, random numbers lrom a variety of probability distribution lunctions are generated to simulate the behavior 01 random events. lnellicient generation of these nnmbers can be a significant bottleneck lor simulation applications. Generating these random numbers imprecisely can skew results. An ellicient and scalable fire& point method for generating random numbers for any probability distribution function in a Field Programmable Gate Array (FPGA) is developed. A Pi estimator, a Monte Carlo integrator, and a stochastic simulator lor chemical species are developed in soltware. Estimates are made regarding their potential to be accelerated using the designed FPG.4. Results are presented which examine lrade-ofls between the number ol gates used by the FPGA and the accuracy 01 the random numbers generated. The work shows that generating random numbers using the designed hardware can signilicantly increase the perlormance of simulation applications that require many random numbers.
This paper presents a partitioning method based on topological ordering and levelization. The proposed method, termed RPL, performs multi-FPGA partitioning by taking into account six different partitioning constraints. We also compare RPL to two existing algorithms. The first approach is a hierarchical partitioning method based on topological ordering (HP). The second approach is a recursive algorithm based on the Fiduccia and Mattheyses bipartitioning heuristic (RP). Experimental results on seven application benchmarks mapped onto three different hardware architectures demonstrated that the proposed RPL approach achieved fewer partitions in less time when compared to the RP and HP algorithms.
An overview of how FPGAs are impacting education is given with an emphasis on how laboratory experiences are used to enhance learning. Courses employing these devices include: Introductory Logic, Advanced Logic (ASIC Prototyping), System-on-Chip and Platform Design, HW/SW Co-Design of Real-Time Embedded Systems, Network Routing, and Multi-disciplinary Capstone Design. Project examples are presented along with specific ways that instructors can collaborate more to enhance the students' experiences and their own productivity.
This paper discusses the design and development of a general-purpose programmable DSP subsystem packaged in a multichip module. The subsystem contains a 32-bir floating-point programmable DSP processor along with 256 K-byte of SRAM, 128 K-byte of FLASH memoty, 10 K-gate FPGA and a &channel 12-bit ADC. The complete subsystem is interconnected on a 37 mm by 37 mm MCM-D substrate and packaged in a 320-pin ceramic quad Jut pack. The design has been submitted to the MIDAS brokerage service to be fabricated by Micro Module Systems. Our experience shows that low-volume MCM prototyping is achievable and somewhat affordable for universities. The design flow, electrical and thermal analyses, CAD tools, cost and lessons learned are discussed in this paper.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.