In the past decade significant effort has been devoted to the development of methodologies for design at the registertransfer level. However, effective and versatile procedures are still not available. This paper presents an efficient procedure for the automated synthesis of data paths at the registertransfer level. The procedure minimizes the numbers of storage elements, data operators, and interconnection units. In addition, the procedure has the capability of exploring alternatives in the design space.In some preliminary experiments the procedure produced designs nearly identical to commercially produced designs.
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