Testing of interconnect resources is one of the most important parts in FPGA testing, since most of the transistors in the chip are dedicated to interconnections. Conventional testing methods are no longer as efficient as before because of the various new types of interconnections and a lack of enough input output blocks (IOBs) in the FPGAs that are based on general routing matrix (GRM). This paper presents a new automatic method for testing FPGA interconnect resources in GRM-based FPGAs. This new method, testing line segments and programmable interconnect points (PIPs) in different stages, is applicable to all kinds of GRM-based FPGAs. Experimental results show that a total of 152 test configurations are sufficient to achieve 99.2% and 99.7% fault coverage for line segments and PIPs in Xilinx XC4VLX15 FPGA respectively and to largely reduce the number of IOBs required in the testing.