Most chips today are designed with 20th century CAD tools. These tools, and the abstractions they are based on, were originally intended to handle designs of millions of gates or less. They are not up to the task of handling today's billion-gate designs. The result is months of delay and considerable labor from final RTL to tapeout. Surprises in timing closure, global congestion, and power consumption are common. Even taking an existing design to a new process node is a time-consuming and laborious process.Twenty-first century CAD tools should be based on higher-level abstractions to enable billion-gate chips to go from final RTL to tapeout in days, not months. Key to attaining this increase in productivity is raising the level of design and using simple, standard interfaces. Designs should be composed from high-level modules -processors, MODEMs, CODECs, memory subsystems, and I/O subsystems -rather than gates and flip-flops. Each module, which we expect to contain 100 thousand to 10 million gates, is easily laid out by today's tools, is placed as a unit, and communicates over a NoC via a standard interface. Restricting modules to standard sizes and aspect ratios further simplifies physical design. We expect even a large chip to contain at most a few thousand such modules and expect the physical design and chip-assembly to take a few days with minimal labor after completion of the module-level design.
Modern multimedia, gaming and entertainment devices epitomize high-growth, consumer-driven applications for silicon. 2006 has been a year that launched several high-profile gaming systems, and major changes in home networking. This year has also witnessed the emergence of the digital home and the ePC, as well as continued struggles for control of the home gateway. Mobiledigital convergence has continued with the fusion of media, telephony, and digital-mobile TV. The industry's ability to rapidly evolve such consumer-centric systems brings to bear all of the technology competencies required for cutting-edge IC designs, as well as for tools and methodologies that support those designs.Multimedia and gaming chips are pushing the leading edge of EDA technology forward on fronts that include architectural synthesis, high-speed clocking, power management, verification, and IP reuse. As just one example, GPU operations per second are growing significantly faster than desktop CPU operations per second, while at the same time, GPU design teams often place less emphasis than microprocessor teams on circuits and layout, and more emphasis on architecture and design enablement. The confluence of these trends leads to design and CAD solutions that are unique in the market space.In this panel session, the panelists have been selected to represent five key "constituencies": the digital home (Intel), mobile digital TV (Samsung), graphics engines (NVIDIA), advanced displays (Pixelworks), and gaming/multimedia processing (IBM). The panel will address such questions as:What are the underlying chip architectures and roadmaps for key multimedia/entertainment platforms?What are the key design and technology challenges (or "brick walls") for next-generation products, and how will these challenges be addressed?Where will we see the next "convergence" in devices and platforms?What other challenges arise from complex supplier and competitor relationships, standards, and other aspects of a globalized market?Other design challenges to be discussed include design enablement (compilers, programming models, etc.), design for IP reuse (configurability, derivatives), and IP management in a world of increasing "co-opetition".
No abstract
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.
customersupport@researchsolutions.com
10624 S. Eastern Ave., Ste. A-614
Henderson, NV 89052, USA
Copyright © 2024 scite LLC. All rights reserved.
Made with 💙 for researchers
Part of the Research Solutions Family.