We demonstrate a large-scale placement of nanoparticles through a scheme named "electrostatic funneling", in which charged nanoparticles are guided by an electrostatic potential energy gradient and placed on targeted locations with nanoscale precision. The guiding electrostatic structures are defined using current CMOS fabrication technology. The effectiveness of this scheme is demonstrated for a variety of geometries including one-dimensional and zero-dimensional patterns as well as three-dimensional step structures. Placement precision of 6 nm has been demonstrated using a one-dimensional guiding structure comprising alternatively charged lines with line width of approximately 100 nm. Detailed calculations using DLVO theory agree well with the observed long-range interactions and also estimate lateral forces as strong as (1-3) x 10(-7) dyn, which well explains the observed guided placement of Au nanoparticles.

Devices in which the transport and storage of single electrons are systematically controlled could lead to a new generation of nanoscale devices and sensors. The attractive features of these devices include operation at extremely low power, scalability to the sub-nanometre regime and extremely high charge sensitivity. However, the fabrication of single-electron devices requires nanoscale geometrical control, which has limited their fabrication to small numbers of devices at a time, significantly restricting their implementation in practical devices. Here we report the parallel fabrication of single-electron devices, which results in multiple, individually addressable, single-electron devices that operate at room temperature. This was made possible using CMOS fabrication technology and implementing self-alignment of the source and drain electrodes, which are vertically separated by thin dielectric films. We demonstrate clear Coulomb staircase/blockade and Coulomb oscillations at room temperature and also at low temperatures.

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Initial void formation in bamboo Al-Cu(1%) two-level structure AIP Conf. Electromigration in Cu thin films is studied in a cross-strip configuration. Cu lines with isolated areas of Cu͑Al͒ or Cu͑Sn͒ are tested between 250 and 390°C with the following results. The hillock and void marker motion indicates that Sn moves in the direction of electron flow. The marker polarity indicates that it decreases the grain boundary electromigration of Cu, in agreement with previous studies. This study also finds evidence of active surface migration in Cu. During tests in forming gas, hillocks and voids form adjacent to a native Al 2 O 3 layer at all temperatures, indicating the likelihood that Cu migrates faster through the Cu free surface than the interface between the surface layer of Al 2 O 3 and Cu͑Al͒. Active surface migration in Cu thin films is also evidenced by the growth of hillocks with highly developed facets, most of which are attached to the underlying film by narrow necks.

This paper is a study of the phase equilibria of the Sn-3.8Ag-0.7Cu alloy investigated by a differential cooling method. The difficulty in assessing phase equilibria of the Sn-Ag-Cu (SAC) system because of the insufficient resolution of conventional characterization techniques is solved by inducing preferential growth of a solid phase in a melt by holding the alloy at the solid-liquid phaseequilibrium field. Application of the technique to Sn-3.8Ag-0.7Cu with varying holding temperatures yielded results that the alloy is slightly off eutectic composition. The phase-formation sequence of the alloy during solidification was found to be Ag 3 Sn, β-Sn, and finally the ternary eutectic microstructure.