This paper proposes a BIST structure for embedded RAMS. The structure has the self-diagnostic capability with only a minimal overhead. It degrades a little on the speed performance of the embedded RAM. Two sets of test patterns, MARCH and CHECKERBOARD, which detect most of the memory faults, are adopted in the scheme. This self-diagnosis capability makes this RAM BIST scheme be able to be incorporated for the embedded RAM self-repaired redundant design to increase its yield. I 0-8186-6245-X/94 $04.00 0 1994 IEEE
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