A low-power low-cost Gaussian frequency shift keying demodulator with a robust frequency offset tolerance is presented. A novel automatic pulse duration calibration is employed to keep the pulse durations of the zero-crossing detection output constant against process variation. Additionally, a discrete-time differentiator is adopted to eliminate the negative effect of frequency offset and drift. The demodulator is implemented in a 0.18-μm CMOS process and the area is approximately 0.08 mm 2 . It can recover data even as the intermediate frequency drifts from 1.5 up to 3.7 MHz during demodulation and requires a signal-to-noise ratio of less than 16.5 dB for a 0.1% bit error rate. The circuit consumes only a 0.51-mA current from a 1.8-V supply.Index Terms-Frequency offset tolerance, Gaussian frequency shift keying (GFSK) demodulation, low cost, low power.
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