HIGH SPEED, high detectivity photodetectors are essential for optical communications. High speed photodetectors currently available are insufficient as to S/N ratio, while those with high detectivity are slow in operational speed.Circuit analysis including noise characteristics reveals that an optimum design of the pre-amplifier first stage that considers matching with the photodiode is most effective, although it has not been precisely reported. From the analysis are also derived requirements for the device parameters, namely that hFE be high, fT high and rbb' low. A bipolar monolithic IC process that includes SIPOS-Si heterojunction transistors' to be reported has been found to provide satisfactory results.A fabricated device with a P-I-N photodiode and a preamplifier exhi Its 30MHz bandwidth and a detectivity (D*) of 1.53 x 10' ' cm HzLk/\V at lOMHz which is 12dB better than is currently available.The circuit is shown in Figure 1. For the input stage of the preamplifier, a common-emitter configuration is used instead of the more popular, but noisy differential type. The optimum bias current has been calculated to give the maximum S/N ratio at 10MHz. Figure 2 shows the cross section of the monolithic structure. Since the temperature of NPN heterojunction emitter formation is fairly low (9OO0C), the base width of PNP transistors made prior to the NPNs can be controlled t o be as narrow as 0.3pm, affording a peak fT of 1.5GI-l~. The NPN transistor has an emitter area of 4pm x 4Opm with fT, rbbr and hFE of 3.5GIIz, 68a and 800, while the conventional device characteristics, with the same emitter area and base Gummel number', are 3GHz, 70a and 50, respectively. Due t o high hFE the shot noise associated with the base current is greatly reduced.The photodiode has an active area of 7.5mm2 and is made of hgh purity silicon (1 to 3ka-cm) covered by a SIPOS film as an anti-reflection coating3. The photodiode operates in the 400 to 1,100nm range and the quantum efficiency at 950nm is 90%. The structure of the P-I-N photodiode is determined by the wavelength and the reverse bias, and the area by the specific application. Figure 3 shows the calculated results of the effects of such parameters as fT, rbbf and hFE. The calculated and experimental output signal and noise levels are shown in Figure 4, where fT of lGHz and hFE of 800 at 1, of 0.4mA arc assumed. Signal levels are flat up to 30"lz, but noise levels increase with frequency, which can be mainly attributed t o thermal and shot noise of the input transistor. Contributions of various noise sources to output power are estimated and illustrated in Figure 5. Calculated results shown in Figure 4 and 5 correspond t o the casc A in Figure 3,
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