Advanced large-scale electrochemical energy storage requires cost-effective battery systems with high energy densities. Aprotic sodium-oxygen (Na-O2) batteries offer advantages, being comprised of low-cost elements and possessing much lower charge overpotential and higher reversibility compared to their lithium-oxygen battery cousins. Although such differences have been explained by solution-mediated superoxide transport, the underlying nature of this mechanism is not fully understood. Water has been suggested to solubilize superoxide via formation of hydroperoxyl (HO2), but direct evidence of these HO2 radical species in cells has proven elusive. Here, we use ESR spectroscopy at 210 K to identify and quantify soluble HO2 radicals in the electrolyte-cold-trapped in situ to prolong their lifetime-in a Na-O2 cell. These investigations are coupled to parallel SEM studies that image crystalline sodium superoxide (NaO2) on the carbon cathode. The superoxide radicals were spin-trapped via reaction with 5,5-dimethyl-pyrroline N-oxide at different electrochemical stages, allowing monitoring of their production and consumption during cycling. Our results conclusively demonstrate that transport of superoxide from cathode to electrolyte leads to the nucleation and growth of NaO2, which follows classical mechanisms based on the variation of superoxide content in the electrolyte and its correlation with the crystallization of cubic NaO2. The changes in superoxide content upon charge show that charge proceeds through the reverse solution process. Furthermore, we identify the carbon-centered/oxygen-centered alkyl radicals arising from attack of these solubilized HO2 species on the diglyme solvent. This is the first direct evidence of such species, which are likely responsible for electrolyte degradation.

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A design for a large-scale surface code quantum processor based on a node/network approach is introduced for semiconductor quantum dot spin qubits. The minimal node contains only seven quantum dots, and nodes are separated on the micron scale, creating useful space for wiring interconnects and integration of conventional transistor circuits. Entanglement is distributed between neighbouring nodes by loading spin singlets locally and then shuttling one member of the pair through a linear array of empty dots. A node contains one data qubit, two ancilla qubits, and additional dots to facilitate electron shuttling and measurement of the ancillas. A four-node GHZ state is realized by sharing three internode singlets followed by local gate operations and ancilla measurements. Further local operations produce an X or Z stabilizer on the four data qubits, which is the fundamental operation of the surface code. Electron shuttling is simulated in the single-valley case using a simple gate electrode geometry without explicit barrier gates, and demonstrates that adiabatic transport is possible on timescales that do not present a speed bottleneck to the processor. An important shuttling error in a clean system is uncontrolled phase rotation of the spin due to modulation of the electronic g-factor during transport, owing to the Stark effect. This error can be reduced by appropriate electrostatic tuning of the stationary electron's g-factor. arXiv:1807.09941v2 [quant-ph]

Shuttling of single electrons in gate-defined silicon quantum dots is numerically simulated. A minimal gate geometry without explicit tunnel barrier gates is introduced, and used to define a chain of accumulation mode quantum dots, each controlled by a single gate voltage. One-dimensional potentials are derived from a three-dimensional electrostatic model, and used to construct an effective Hamiltonian for efficient simulation. Control pulse sequences are designed by maintaining a fixed adiabaticity, so that different shuttling conditions can be systematically compared. We first use these tools to optimize the device geometry for maximum transport velocity, considering only orbital states and neglecting valley and spin degrees of freedom. Taking realistic geometrical constraints into account, charge shuttling speeds up to ∼ 300 m/s preserve adiabaticity. Coherent spin transport is simulated by including spin-orbit and valley terms in an effective Hamiltonian, shuttling one member of a singlet pair and tracking the entanglement fidelity. With realistic device and material parameters, shuttle speeds in the range 10 − 100 m/s with high spin entanglement fidelities are obtained when the tunneling energy exceeds the Zeeman energy. High fidelity also requires the inter-dot valley phase difference to be below a threshold determined by the ratio of tunneling and Zeeman energies, so that spin-valley-orbit mixing is weak. In this regime, we find that the primary source of infidelity is a coherent spin rotation that is correctable, in principle. The results pertain to proposals for large-scale spin qubit processors in isotopically purified silicon that rely on coherent shuttling of spins to rapidly distribute quantum information between computational nodes.

We discuss the effects of a gauge freedom in representing quantum information processing devices, and its implications for characterizing these devices. We demonstrate with experimentally relevant examples that there exists equally valid descriptions of the same experiment which distribute errors differently among objects in a gate-set, leading to different error rates. Consequently, it can be misleading to attach a concrete operational meaning to figures of merit for individual gate-set elements. We propose an alternative operational figure of merit for a gate-set, the mean variation error, and a protocol for measuring this figure.