A comparator in a low-power 65-nm complementary metal-oxide-semiconductor process (only standard transistors with threshold voltage V t ≈ 0.4 V were used) is presented, where the circuit of a conventional latch-type comparator consisting of two cross-coupled inverters is modified for fast operation, even with 0.6 GHz at a low supply voltage of 0.65 V. The advantages of a high-impedance input, rail-to-rail output swing, robustness against the influence of mismatch, and no static power consumption are kept. To achieve a bit error rate of 10 −9 at 1.2-V supply, an amplitude at the input of 16.5 mV at 4 GHz has to be applied. If the supply voltage is lowered, 12.1 mV at 0.6 GHz/0.65 V is necessary. The power consumption of the comparator is 2.88 mW at 5 GHz (1.2 V) and 128 μW at 0.6 GHz (0.65 V). Simulations show an offset standard deviation of about 6.1 mV at 0.65-V supply. With an on-chip measurement circuit, the delay time of the comparator of, e.g., 104 ps for 15-mV input amplitude at 1.2-V supply, is obtained. Index Terms-Comparator, complementary metal-oxidesemiconductor (CMOS) analog circuits, low supply voltage, modified latch, ultradeep submicrometer (UDSM) CMOS.
max 150 (150) words:Optical modulators based upon carrier depletion have proven to be an effective method to achieve high speed operation in silicon. However, when incorporated into Mach-Zehnder Interferometer structures they require electronic driver amplifiers to provide peak to peak drive voltages of a few volts in order to achieve a large extinction ratio. For minimal performance degradation caused by the electrical connection between the driver and the modulator monolithic integration in the front end of the process is the preferred integration route. The formation of electronic driver amplifiers in BiCMOS is advantageous over CMOS in terms of achievable performance versus cost. In this work the first monolithic photonic integration in the electronic front-end of a high-performance BiCMOS technology process is demonstrated. Modulation at 10Gbit/s is demonstrated with an extinction ratio >8dB. The potential scalability of both the silicon photonic and BiCMOS elements make this technology an attractive prospect for the future.
Abstract max 500 (420) words:Optical modulators based upon the plasma dispersion effect have proven to be an effective method to monolithically achieve high speed modulation in silicon. More specifically those which use carrier depletion in a reverse bias pn junction positioned to interact with the propagating light provide the best trade-off of performance and fabrication simplicity. Mach-Zehnder Interferometer versions of these devices which incorporate carrier depletion phase modulators into both waveguide arms offer a wide optical bandwidth, thermal stability, low chirp, reasonable tolerance to fabrication variations and no photon cavity lifetime limitation as compared to resonant based devices. Such modulators require electronic driver amplifiers to provide peak to peak drive voltages of a few volts in order to achieve a large extinction ratio from devices on the order of a mm in length. The formation of electronic driver amplifiers in BiCMOS is advantageous over CMOS in terms of achievable performance versus cost. BiCMOS technology achieves a higher figure of merit (maximum oscillation frequency × breakdown voltage) compared to CMOS and also requires lower specification lithography, which is also capable of forming the photonic elements, leading to high performance at lower chip cost. The integration of the optical modulator and the drive amplifier is a process required to fulfil a number of applications. Different methods for integration have been proposed and demonstrated, however, the frontend integration of silicon photonics and electronics which involves the fabrication of electronic components such as transistors and photonic components such as optical waveguides side by side on the same substrate, allows for higher performances to be reached over alternative approaches since degradation due to bond pads and bond wires is avoided. In this work the first monolithic photonic integration in the electronic frontend of a high-performance BiCMOS technology is demonstrated...
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