This work presents a fully integrated mixed-mode low-dropout voltage regulator that achieves a fast transient response by utilizing two feedback mechanisms. The first feedback mechanism is the conventional analog regulation that includes an operational amplifier. The second feedback mechanism is based on digitizing any fast change in the output voltage using multiple comparators and subsequently enabling either an NMOS-based or a PMOS-based current DAC. The DAC provides current in opposite polarity to the sharp transient change in load current. As a result, addressing sharp changes in load current is not limited by the gain–bandwidth product of the error amplifier. The LDO was implemented using 180-nm CMOS technology devices. It uses a supply voltage input range of 1.6–2[Formula: see text]V and produces an output voltage of 1.2[Formula: see text]V. In simulations, the LDO regulator achieves 143-[Formula: see text] A quiescent current, [Formula: see text]56-dB PSRR @ 1-kHz noise frequency and an output voltage drop of around 200[Formula: see text]mV for a load current step of 100[Formula: see text]mA. The LDO can provide a maximum load current of 200[Formula: see text]mA.
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