We report on a method for the fabrication of graphene on a silicon dioxide substrate by solid-state dissolution of an overlying stack of a silicon carbide and a nickel thin film. The carbon dissolves in the nickel by rapid thermal annealing. Upon cooling, the carbon segregates to the nickel surface forming a graphene layer over the entire nickel surface. By wet etching of the nickel layer, the graphene layer was allowed to settle on the original substrate. Scanning tunneling microscopy (STM) as well as Raman spectroscopy has been performed for characterization of the layers. Further insight into the morphology of the layers has been gained by Raman mapping indicating micrometer-size graphene grains. Devices for electrical measurement have been manufactured exhibiting a modulation of the transfer current by backgate electric fields. The presented approach allows for mass fabrication of polycrystalline graphene without transfer steps while using only CMOS compatible process steps.