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The goal of this present paper is to design, analysis the influence of the inductor geometrical parameters and the effect of the metal thickness on the quality factor-Q in integrated square spiral inductor using an efficient application of the artificial bee colony (ABC) algorithm. The inductors were optimized at 2.4 GHz to determinate their major geometrical dimensions (sp, w, din…) and their number of turns, for uses in radio-frequency integrated circuits (RFICs). The optimization results are validated by the simulation using an electromagnetic simulator (ADS-Momentum). Using matlab software, the study on the impact of the effect of geometrical parameters and the effect of metal thickness, on the factor of quality-Q of spiral inductors, is shown. We first reported that it is possible to improve Q-factors further by increasing the metal thickness, and in the design of inductor; a compromise must be reached between the value of w, n, sp and din to achieve the desired quality factor-Q and other electrical parameters.

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<span lang="EN-US">The optimal sizing of analog circuits is one of the most complicated processes, because of the number of variables taken into, to the number of required objectives to be optimized and to the constraint functions restrictions. The aim is to automate this activity in order to accelerate the circuits design and sizing. In this paper, we deal with the optimization of the three stage bipolar transistor amplifier performances namely the voltage gain (A_V), the input impedance (Z_IN), the output impedance (Z_OUT), the power consumption (P) and the low and the high cutoff frequency (F_L,F_H), through the Genetic Algorithm (GA). The presented optimization problem is of multi-dimensional parameters, and the trade-off of all parameters. In fact, the passive components (Resistors and Capacitors) are selected from manufactured constant values (E12, E24, E48, E96, E192) for the purpose of reduce the cost of design; also, the intrinsic parameters of transistors (hybrid parameters and the junction capacitances) are considered variables in order not to be limited in design. SPICE simulation is used to validate the obtained result/performances.</span>

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The Ant Colony Optimizat ion (ACO) algorith m is used as a multi-object ive optimization technique to size a most popular analog circuit, the CMOS operational amp lifier (Op-A mp). The work consist of finding the more convenient transistors sizes, including the channel widths and lengths, in o rder to meet or reach the specified requirements such as the voltage gain Av, the Co mmon Mode Rejection Ratio CM RR, the die area A, the power consumption P and the Slew Rate SR. SPICE simulat ions are used to strengthen and to validate the obtained sizing/performances.

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