An 8jm pixel 1 152 x 64 stage time delay and integration scanning visible imaging CCD which uses transparent tin oxide gates has been fabricated. The tin oxide gates provide a front side illuminated device with a peak quantum efficiency of greater than 80 % . The chip features forward and reverse scan, variable TDI and commandable pixel size by the use of aggregation wells. The 1152 detector columns are subdivided into 8 subchips of 144 detector columns each. Buried Channel Charge Handling Capacity (CHC) of lOOke-and Charge Transfer Efficiency (CTE) of 0.99999 has been measured. It is designed to operate at variable scan rates up to 52,000 lines per second. IntroductionA front-side illuminated 1152 x 64 stage time delay and integration (TDI) charge coupled device (CCD) with 8/Lm pixels and transparent tin oxide gates has been successfully designed, fabricated, and evaluated using the N-channel tin oxide CCD process that has been developed and refined over the past eighteen years at Westinghouse'. This paper will discuss the advantages of tin oxide gates, the CCD design issues, and the test results. WEC Front-Side Illuminated SensorsA typical industry standard CCD uses polysilicon as its gate material. For many years, the CCD sensor industry has been developing techniques for back-side thinning to achieve high quantum efficiency. This process is both costly and time consuming.The CCDs manufactured at Westinghouse use a unique transparent gate material which gives high quantum efficiency over the entire visible spectrum. While industry standard polysilicon gate CCDs have 20% QE over the 400nm to 900nm range, typical Westinghouse tin oxide gate CCDs have an average QE of 70% directly through the front surface over the same Figure 1 Quantum Efficiency of Tin Oxide and Poly Gate CCDs O-8194-1188-4/93/$6.OO SPIE Vol. 1952 /43 Average QE 0.1 Potysilicon \. o I I I I I 375 425 475 525 575 625 675 725 775 825 875 925 975 Wavelength (nanometers) Downloaded From: http://proceedings.spiedigitallibrary.org/ on 06/20/2016 Terms of Use: http://spiedigitallibrary.org/ss/TermsOfUse.aspx
A versatile high performance Frame Transfer and Storage imaging device has been demonstrated using tin oxide gates and Open Pinned Phase (OPP) technology. The device consists of a 512 x 512 imaging array and integral 5 12 x 512 frame buffer. The detector size is 1 8m x 1 8gm, however, pixel size is electronically controllable by detector aggregation in the X and Y directions. The use of tin oxide gates and OPP technology provide a front side illuminated device with high Quantum Efficiency and low leakage. This combination of features yields a mechanically robust high resolution imager, ideally suited for military, scientific, and commercial applications requiring high sensitivity and/or long stare times.
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