As device dimensions continue to be scaled, incorporation of silicon-on-insulator ͑SOI͒ as mainstream complementary metal-oxide-semiconductor technology also increases. This experiment set out to further investigate the effect of the surface Si/buried oxide ͑BOX͒ interface on the formation and dissolution of extended defects in SOI. UNIBOND® wafers were thinned to 300, 700, and 1600 Å. Si ϩ ion implantation was performed from 5 to 40 keV with a constant, nonamorphizing dose of 2ϫ10 14 cm Ϫ2 . Inert ambient furnace anneals were performed at 750°C for times of 5 min up to 8 h. Transmission electron microscopy was used to study the evolution of extended defects, as well as to quantify the number of trapped interstitials. It is observed that the surface Si/BOX interface does not enhance the dissolution rate of extended defects unless у15% of the dose is truncated by the BOX. Further, no reduction in the trapped interstitial concentration is seen unless у6% of the dose is truncated. It is concluded that the surface Si/BOX interface does not serve as a significant sink for interstitial recombination, as long as the interstitial profile is mostly confined to the surface Si layer.

End of range ͑EOR͒ defects are the most commonly observed defects in ultrashallow junction devices. They nucleate at the amorphous-crystalline interface upon annealing after amorphization due to ion implantation. EOR defects range from small interstitial clusters of a few atoms to ͕311͖ defects and dislocation loops. They are extrinsic defects and evolve during annealing. Li and Jones ͓Appl. Phys. Lett., 73, 3748 ͑1998͔͒ showed that ͕311͖ defects are the source of the projected range dislocation loops. In this article, the same theory is applied to EOR dislocation loops to model the nucleation and evolution of the loops. The model is verified with experimental data and accurately represents the nucleation, growth, and Ostwald ripening stages of dislocation loop evolution. The density and the number of interstitials trapped by dislocation loops are compared with the experimental results for several annealing times and temperatures.

We have investigated the electrical activation of implanted boron in silicon-on-insulator (SOI) material using Hall effect, four-point probe, and secondary ion mass spectrometry. Boron was implanted at energies ranging from 1 keV to 6.5 keV with a dose of 3 ϫ 10 14 cm −2 into bonded SOI wafers with surface silicon thickness ranging from 300 Å to 1600 Å. In one sample set, furnace anneals at 750°C were performed in a nitrogen ambient for times ranging from 5 min to 48 h. A second sample consisted of isochronal furnace anneals performed from 450°C to 1050°C for 30 min. Significantly less activation of boron is observed in SOI at temperatures below 750°C, regardless of the implant energy and surface silicon thickness. Between 750°C and 900°C, the active dose of boron in SOI is similar to that of bulk Si. As the implant energy increases, the fractional activation in thin SOI increases, due to a reduction in boron interstitial clusters (BIC) in the surface Si layer. It is concluded that an increase in the BIC population is the likely source of the low activation observed in SOI. This may be due to an increase in the interstitial supersaturation within the surface Si layer, due to the interface acting as a reflective boundary for interstitials.

Silicon-on-insulator (SOI) has proven to be a viable alternative to traditional bulk silicon for fabrication of complementary metal–oxide–semiconductor devices. However, a number of unusual phenomena with regards to diffusion and segregation of dopants in SOI have yet to be explained. In the present study, SOITEC wafers were thinned to 700 and 1600 Å using oxidation and etching. Ion implantation was performed into SOI and bulk silicon wafers using B+11 ions at 6.5 and 19 keV with a dose of 3×1014 cm−2. Thermal processing occurred in a furnace at 750 °C for times ranging from 5 min to 8 h under an inert ambient. Using quantitative transmission electron microscopy it was observed that the concentration of trapped interstitials and density of {311} defects was significantly reduced in SOI compared to the bulk. Hall effect was used to monitor the activation process of boron in SOI and bulk silicon. Significantly less activation was observed in SOI compared to the bulk and was dependent on the surface silicon thickness. For the first time, a decrease in the trapped interstitial concentration is observed in SOI even with minimal dose loss to the buried oxide. It is hypothesized that the formation of boron–interstitial clusters may be more pronounced in SOI, leading to a reduction in the trapped interstitial population and {311} defect density.

The effect of silicon-on-insulator ͑SOI͒ substrate type and surface silicon thickness on extended defect evolution due to silicon ion implantation has been investigated. Nonamorphizing silicon implants ranging from 15 to 48.5 keV, 1 ϫ 10 14 cm Ϫ2 , were performed into SOITEC and separation by implantation of oxygen ͑SIMOX͒ wafers. Subsequently, furnace anneals were performed at 750°C in an inert ambient. Quantitative transmission electron microscopy was used to measure the trapped interstitial concentration, defect density, and defect size. The type of surface silicon/buried oxide interface ͑e.g., SIMOX or SOITEC͒ does not appear to affect the decay of the trapped interstitial population or the evolution of the defect microstructure. However, the thickness of the surface silicon/BOX interface strongly affects the evolution of ͕311͖ defects, as well as the decay of trapped interstitials. The interface appears to promote formation of dislocation loops as the trapped interstitial population evolves.