Germanium is a promising material for future very large scale integration transistors, due to its superior hole mobility. However, germanium-based devices typically suffer from high reverse junction leakage due to the low band-gap energy of 0.66 eV and therefore are characterized by high static power dissipation. In this paper, we experimentally demonstrate a solution to suppress the off-state leakage in germanium nanowire Schottky barrier transistors. Thereto, a device layout with two independent gates is used to induce an additional energy barrier to the channel that blocks the undesired carrier type. In addition, the polarity of the same doping-free device can be dynamically switched between p- and n-type. The shown germanium nanowire approach is able to outperform previous polarity-controllable device concepts on other material systems in terms of threshold voltages and normalized on-currents. The dielectric and Schottky barrier interface properties of the device are analyzed in detail. Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.

Atomic layer deposition-grown Al2O3 thin films are grown on n-type GaN and annealed at 300 or 500 °C in various atmospheres. Metal–insulator–semiconductor capacitors (MISCAPs) are used as simplified test structures for AlGaN/GaN heterostructure field effect transistors with an Al2O3 gate dielectric. Electrical characterization of the unannealed MISCAPs reveals a low leakage current density of ∼1.4 × 10−9 A/cm2 at −2 MV/cm. Annealing at 500 °C in N2 or a forming gas results in a degradation of this leakage level by more than one order of magnitude, whereas the leakage current of the Al2O3 films annealed at 500 °C in O2 is increased to ∼5.2 × 10−9 A/cm2 at −2 MV/cm. The photoassisted capacitance–voltage technique, the conductance method, and border trap analysis are used to study the influence of the annealing ambient atmosphere upon the Al2O3/GaN interface. For all atmospheres, thermal treatments at 500 °C marginally affects the border oxide trap density, but the forming gas anneal at 500 °C passivates the interface traps most efficiently. While the O2 thermal treatment reduces the interface trap density in the Al2O3/GaN system, the N2 anneal creates interface trap states, indicating the formation of an oxygen deficient defect level at the Al2O3/GaN interface during N2 annealing.

Articles you may be interested inHigh quality HfO2/p-GaSb (001) metal-oxide-semiconductor capacitors with 0.8 nm equivalent oxide thickness Appl. Phys. Lett. 105, 222103 (2014); 10.1063/1.4903068 Quantitative characterization of interface traps in Al2O3/AlGaN/GaN metal-oxide-semiconductor high-electronmobility transistors by dynamic capacitance dispersion technique Appl. Phys. Lett. 103, 033510 (2013); 10.1063/1.4813912 Study of gate oxide traps in HfO2/AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors by use of ac transconductance method A comprehensive analytical model for threshold voltage calculation in GaN based metal-oxide-semiconductor high-electron-mobility transistors Appl. Phys. Lett. 100, 113509 (2012); 10.1063/1.3694768 Trap states in AlGaN/GaN metal-oxide-semiconductor structures with Al 2 O 3 prepared by atomic layer depositionIn this work, we present the terrace etching technique to obtain excessive thickness series of atomic layer deposition (ALD) grown Al 2 O 3 and HfO 2 on GaN-cap/AlGaN/GaN heterostructures allowing for the detailed study of oxide charge distribution and its impact of the metal-insulatorsemiconductor high electron mobility transistor (MISHEMT) threshold voltage. By modeling the experimental plot of threshold voltage versus oxide thickness on the basis of experimentally determined two-dimensional electron gas charge density in AlGaN/GaN MISHEMTs, we separated the interface and bulk charge components and determined the oxide-metal barrier height for the investigated gate dielectrics. In both Al 2 O 3 and HfO 2 gate dielectrics, the oxide charges are mainly located at the oxide/GaN interface. Determining the interface trap charges from comparison of the pulsed capacitance-voltage (CV) technique with very fast voltage sweep to the modulation type CV method with slow DC voltage ramp, we extracted positive fixed charges of N Ox ¼ 2:7 Â 10 12 cm À2 for Al 2 O 3 and N Ox ¼ 7:8 Â 10 12 cm À2 for HfO 2 . We found a strong V th shift of opposite direction for both high-k materials, corresponding to negatively charged up trap states at the HfO 2 /GaN interface and positively charged up trap states at the Al 2 O 3 /GaN interface. The evaluation of the metal-oxide barrier height in dependence of the metal work function followed the trend of the Schottky model, whereas HfO 2 showed less Fermi level pinning compared to Al 2 O 3 indicating the presence of an increased number of interface states in Al 2 O 3 on GaN. V C 2015 AIP Publishing LLC. [http://dx.

Metal–insulator–semiconductor (MIS) capacitor structures were fabricated on AlGaN/GaN two-dimensional electron gas heterostructure material in order to investigate important aspects of the gate module of a corresponding MIS-high electron mobility transistor device. The process sequence started with an initial wet chemical surface treatment of the as-grown semiconductor material followed by an atomic layer deposition of Al2O3 (high-k first). The electrical analysis focused on the gate leakage current as well as on the shift of the threshold voltage (Vth) upon bias stress in the off- and the on-state regions. The high-k first samples showed much better Vth stability compared to lithographically processed samples, in which the high-k deposition was performed after ohmic contact formation and just before the gate electrode metallization. These results reflect a superior quality of the high-k/GaN interface for the processed structures according to the high-k first approach.

We report on the investigation of the V th drift behaviour of AlGaN/GaN MISHEMTs upon forward gate voltage stress in dependence of stress bias and stress time. The pulsed measurements allow for the evaluation of the operational regime for optimum device efficiency. We compared the effect of two different high-k gate dielectric materials with similar equivalent oxide thickness e 0 e r /t high-k on the V th instability in order to separate the influence of the heterojunction design and the high-k/GaN-cap interface from the bulk high-k. The matched gate capacitance coupling of the studied Al 2 O 3 and HfO 2 gate dielectric results in an nearly identical critical forward gate voltage, where the AlGaN barrier potential is lowered and severe threshold voltage shift (DV th ) into the positive voltage direction is induced. Beyond this critical forward voltage, detailed time-dependent stress pulse measurements from 1 ms to 1000 s revealed an immediate electron injection and trapping at the oxide/GaN interface for stress pulses with t stress ! 1 ms. The presented results of V th drift analysis demonstrate the limits of the maximum tolerable forward gate voltage of the investigated Al 2 O 3 and HfO 2 MISHEMTs, although the excellent low-leakage currents of the insulated gate would imply a potentially higher gateoverdrive.