The surface morphology in polycrystalline silicon (poly-Si) film is an issue regardless of whether conventional excimer laser annealing (ELA) or the newer metal-induced lateral crystallization (MILC) process is used. This paper investigates the stress distribution while undergoing long-term mechanical stress and the influence of stress on electrical characteristics. Our simulated results show that the nonuniform stress in the gate insulator is more pronounced near the polysilicon/gate insulator edge and at the two sides of the polysilicon protrusion. This stress results in defects in the gate insulator and leads to a nonuniform degradation phenomenon, which affects both the performance and the reliability in thin-film transistors (TFTs). The degree of degradation is similar regardless of bending axis (channel-length axis, channel-width axis) or bending type (compression, tension), which means that the degradation is dominated by the protrusion effects. Furthermore, by utilizing long-term electrical bias stresses after undergoing long-tern bending stress, it is apparent that the carrier injection is severe in the subchannel region, which confirms that the influence of protrusions is crucial. To eliminate the influence of surface morphology in poly-Si, three kinds of laser energy density were used during crystallization to control the protrusion height. The device with the lowest protrusions demonstrates the smallest degradation after undergoing long-term bending.
High-dielectric-constant Ta2O5 has been grown on the n-GaN epifilm by rf magnetron sputtering. Photoluminescence measurement has been performed to compare the luminescence intensity with and without the dielectrics. Threefold increase in intensity is obtained, and a surface recombination velocity is estimated to be 3×104 cm/s as an upper limit using a modified dead-layer model. A metal-oxide-semiconductor structure has been fabricated with Al on n-GaN as the ohmic contact and on Ta2O5 as the gate metal. Capacitance-versus-voltage characteristics have been measured. The doping concentration obtained from the depletion regime is compared with the result of Hall measurement, which is 7.0×1016 cm−3. The flat-band voltage is obtained from the high-frequency data, and the effective oxide charge number density is calculated as 4.1×1012 cm−2. Indication of strong inversion appears at low reverse bias due to the high dielectric constant of Ta2O5, and matches closely with calculated values. Hysteresis is observed and ascribed to positive mobile charges derived as 2.1×1012 cm−2. The capacitance dependence on the frequency and the leakage current are discussed.
This paper investigates the channel hot carrier stress (CHCS) effects on gate-induced drain leakage (GIDL) current in high-k/metal-gate n-type metal-oxide-semiconductor field effect transistors. It was found that the behavior of GIDL current during CHCS is dependent upon the interfacial layer (IL) oxide thickness of high-k/metal-gate stacks. For a thinner IL, the GIDL current gradually decreases during CHCS, a result contrary to that found in a device with thicker IL. Based on the variation of GIDL current at different stress conditions, the trap-assisted band-to-band hole injection model is proposed to explain the different behavior of GIDL current for different IL thicknesses.
This letter systematically investigates the origin of gate-induced floating-body effect (GIFBE) in partially depleted silicon-on-insulator p-type MOSFETs. The experimental results indicate that GIFBE causes a reduction in the electrical oxide field, leading to an underestimate of negative-bias temperature instability degradation. This can be partially attributed to the electrons tunneling from the process-induced partial n + polygate. However, based on different operation conditions, we found that the dominant origin of electrons was strongly dependent on holes in the inversion layer under source/drain grounding. This suggests that the mechanism of GIFBE at higher voltages is dominated by the proposed anode electron injection model, rather than the electron valence band tunneling widely accepted as the mechanism for n-MOSFETs.
Index Terms-EVB tunneling, gate-induced floating-body effect (GIFBE), negative-bias temperature instability (NBTI), silicon-on-insulator (SOI).
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