Application-specific programmable processors tailored for the requirements at hand are often at the center of today's embedded systems. Therefore, it is not surprising that considerable effort has been spent on constructing tools that assist in codesigning application-specific processors for embedded systems. It is desirable that such design toolsets support an automated design flow from application source code down to synthesizable processor description and optimized machine code. In this paper, such a toolset is described. The toolset is based on a customizable processor architecture template, which is VLIW-derived architecture paradigm called Transport Triggered Architecture (TTA). The toolset addresses some of the pressing shortcomings found in existing toolsets, such as lack of automated exploration of the "design space", limited run time retargetability of the design tools or restrictions in the customization of the target processors.
Abstract. Source code transformations are a very effective method of parallelizing and improving the efficiency of programs. Unfortunately most compiler systems require implementing separate (sub-)programs for each transformation. This paper describes a different approach. We designed and implemented a fully programmable C code transformation engine, which can be programmed by means of a powerful and easy to use transformation language. Its possible applications range from coarse-grain parallelism exploitation to optimizers for multimedia instruction sets.
Abstract. In processors that do not support floating-point instructions, using fixed-point arithmetic instead of floating-point emulation trades off computation accuracy for execution speed. This trade-off is often profitable. In many cases, like embedded systems, low-cost and speed bounds make it the only acceptable option. We present an environment supporting fixed-point code generation from C programs. It allows the user to specify the position of the binary point in the source code and let the converter automatically transform floating-point variables and operations. We demonstrate the validity of our approach on a series of experiments. The results show that, compared to floating-point, fixedpoint arithmetic executed on an integer datapath has a limited impact on the accuracy. In the same time the fixed-point code is 3 to 8 times faster than its equivalent floating-point emulation on an integer datapath.
Program code size has become a critical design constraint of embedded systems. Code compression is one of the approaches to reduce the program code size; it results in smaller memories and reduced cost of the chip. In this paper, a code compression method based on instruction templates has been used to improve the code density of transport triggered architecture. Six applications taken from different application domains are used for benchmarking. The obtained results show significant improvements in code density.
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