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In this research, nano-ring light-emitting diodes (NRLEDs) with different wall width (120 nm, 80 nm and 40 nm) were fabricated by specialized nano-sphere lithography technology. Through the thinned wall, the effective bandgaps of nano-ring LEDs can be precisely tuned by reducing the strain inside the active region. Photoluminescence (PL) and time-resolved PL measurements indicated the lattice-mismatch induced strain inside the active region was relaxed when the wall width is reduced. Through the simulation, we can understand the strain distribution of active region inside NRLEDs. The simulation results not only revealed the exact distribution of strain but also predicted the trend of wavelength-shifted behavior of NRLEDs. Finally, the NRLEDs devices with four-color emission on the same wafer were demonstrated.

In this report, the improved lasing performance of the III-nitride based vertical-cavity surface-emitting laser (VCSEL) has been demonstrated by replacing the bulk AlGaN electron blocking layer (EBL) in the conventional VCSEL structure with an AlGaN/GaN multiple quantum barrier (MQB) EBL. The output power can be enhanced up to three times from 0.3 mW to 0.9 mW. In addition, the threshold current density of the fabricated device with the MQB-EBL was reduced from 12 kA/cm2 (9.5 mA) to 10.6 kA/cm2 (8.5 mA) compared with the use of the bulk AlGaN EBL. Theoretical calculation results suggest that the improved carrier injection efficiency can be mainly attributed to the partial release of the strain and the effect of quantum interference by using the MQB structure, hence increasing the effective barrier height of the conduction band.

GaN HEMT has attracted a lot of attention in recent years owing to its wide applications from the high-frequency power amplifier to the high voltage devices used in power electronic systems. Development of GaN HEMT on Si-based substrate is currently the main focus of the industry to reduce the cost as well as to integrate GaN with Si-based components. However, the direct growth of GaN on Si has the challenge of high defect density that compromises the performance, reliability, and yield. Defects are typically nucleated at the GaN/Si heterointerface due to both lattice and thermal mismatches between GaN and Si. In this article, we will review the current status of GaN on Si in terms of epitaxy and device performances in high frequency and high-power applications. Recently, different substrate structures including silicon-on-insulator (SOI) and engineered poly-AlN (QST®) are introduced to enhance the epitaxy quality by reducing the mismatches. We will discuss the development and potential benefit of these novel substrates. Moreover, SOI may provide a path to enable the integration of GaN with Si CMOS. Finally, the recent development of 3D hetero-integration technology to combine GaN technology and CMOS is also illustrated.

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