In this paper, an advanced electrothermal simulation strategy is applied to a 3.3 kV silicon carbide MOSFET power module. The approach is based on a full circuital representation of the module, where use is made of the thermal equivalent of the Ohm’s law. The individual transistors are described with subcircuits, while the dynamic power-temperature feedback is accounted for through an equivalent thermal network enriched with controlled sources enabling nonlinear thermal effects. A synchronous step-up DC-DC converter and a single-phase inverter, both incorporating the aforementioned power module, are simulated. Good accuracy was ensured by considering electromagnetic effects due to parasitics, which were experimentally extracted in a preliminary stage. Low CPU times are needed, and no convergence issues are encountered in spite of the high switching frequencies. The impact of some key parameters is effortlessly quantified. The analysis witnesses the efficiency and versatility of the approach, and suggests its adoption for design, analysis, and synthesis of high-frequency power converters in wide-band-gap semiconductor technology.

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This paper discusses first the discriminating phenomena yielding either a fail-to-short or fail-to-open circuit signature in 1200 V SiC power MOSFETs undergoing shortcircuit electro-thermal stress. Since fail-to-open behavior is of particular relevance to the application, the paper goes on to propose a benchmarking of a number of commercial devices, identifying a single product which offers consistent fail-to-open characteristics with bias voltages up to at least 50% of nominal rating. For that particular device, a thorough functional and structural characterization is presented. In particular, it is shown that: the gate current is an effective monitor of ensuing degradation under short-circuit stress and can be used to assess damage accumulation, as well as the reversible or permanent nature of device degradation; fail-to-open signature is associated with degradation of the gate-structure, with the creation of shortcircuits between the gate and source terminals in regions relatively far away from the active cells and not involving the field oxide. The findings are relevant to application of both discrete devices and multi-chip power modules, including multiple parallel connected dies.

Despite their growing adoption in a variety of applications, SiC MOSFETs are generally not available at high current rating. Therefore, there is a high demand for power modules exploiting configurations based on parallel devices. However, these products still need optimization in order to ensure long-term reliability. This paper presents a methodology relying on fast electrothermal simulations aimed at aiding this optimization procedure. The proposed approach is applied to a power module in which the parallel MOSFETs are realistically subject to mismatched parameters.

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This paper proposes the detailed analysis of the short-circuit failure mechanism of a particular class of silicon carbide (SiC) power MOSFETs, exhibiting a safe fail-to-open-circuit type signature. The results are based on extensive experimental testing, including both functional and structural characterisation of the transistors, specifically devised to bring along gradual degradation and progressive damage accumulation. It is shown that the soft failure feature is associated with degradation and eventual partial shorting of the gate-source structure. Moreover, partial recovery, induced here by ad-hoc off-line biasing, is observed on degraded components. The results indicate that it is a realistic new option for deployment in the application to yield enhanced system level robustness and system-level hopping-home operational mode capability, of great importance in a number of reliability critical domains, such as, for instance, transportation.

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