High performance low temperature polycrystalline silicon (poly-Si) thin film transistors (TFTs) with large grains were created using diode pumped solid state (DPSS) continuous wave (CW) laser lateral crystallization (CLC), employing fabrication processes at 450°C. Field-effect mobilities of 566 cm2/Vs for the n-channel and 200 cm2/Vs for the p-channel were obtained for a thick Si film (100–150 nm) on a 300×300 mm non-alkaline glass substrate. The high performance of the TFTs is attributed to the predominantly (100)-oriented very large grains. With a decreasing Si-film thickness, the grain size decreases, and the surface orientation of the grain changes from (100) to other orientations. These effects lead to reduced field-effect mobility with decreasing Si-film thickness, but it is easy to obtain a high field-effect mobility of over 300 cm2/Vs, even with a 50 nm thick Si film, without special processing techniques. A complementary metal oxide semiconductor (CMOS) ring oscillator was fabricated using a thin Si film 65 nm thick to demonstrate the high circuit performance of CLC poly-Si TFTs by applying the simplest CMOS process technology. A delay of 400 ps/stage at a gate length of 1.5 µm and a supply voltage of V dd=5.0 (V) was produced on a large non-alkaline glass substrate utilizing a fabrication temperature of 450°C. This crystallization method will lead to the fabrication of high-performance and cheap Si-LSI circuits on large non-alkaline glass substrates.

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Properties of intrinsic gettering of Fe were studied by measuring Fe-B complex concentration and interstitial Fe concentration in a denuded zone after isochronal or isothermal annealing followed by quenching using deep level transient spectroscopy. We calculated the Fe concentration as the Fe-B complex concentration plus the interstitial Fe concentration. Silicon wafers were contaminated with a surface Fe concentration of 4.2×1011 to 3.2×1013 cm−2 to show the relation between Fe concentration in the wafer and the temperature at which gettering occurs. Supersaturation of Fe impurities was found necessary for intrinsic gettering of Fe in the contamination range of 4.0×1012 to 3.5×1014 cm−3. Therefore, the gettering temperature is lower for low-level Fe contamination than for high-level contamination. The reduction of Fe concentration saturated with annealing time, which shows that the oxygen precipitates in the bulk defect region do not work as an infinite gettering sink. We found that the saturated Fe concentration follows a simple Arrhenius relationship, so that gettering stops at the thermal equilibrium concentration. We think that in intrinsic gettering, Fe precipitates preferentially in the bulk defect region when the Fe impurities supersaturate with decreasing temperature.

The effects of various carrier scattering mechanisms on excimer-laser-crystallized polycrystalline silicon (poly-Si) thin film transistors (TFTs) fabricated using 450 °C processes on a glass substrate were studied. Good performance of a separated by ion implanted oxygen (SIMOX) metal–oxide–semiconductor field-effect transistor (MOSFET) with field-effect mobility of 670 cm2/V s and a subthreshold swing value of 0.087 V/dec was obtained using these 450 °C processes. The results showed the formation of a good silicon/silicon dioxide (SiO2) interface that is comparable to that of thermal oxide, as well as the high capability of 450 °C processes. The performance of the above SIMOX-MOSFET is superior to that of excimer-laser-crystallized poly-Si TFTs fabricated using the same 450 °C processes. This shows that poorer performance of poly-Si TFTs is caused by the poor crystalline quality of the poly-Si film. The field-effect mobility is affected little by the in-grain microdefects and surface morphology of the excimer-laser-crystallized poly-Si film, but it is highly sensitive to the grain size. A field-effect mobility of 320 cm2/V s was obtained for an average grain size of 700 nm. The increase in field-effect mobility began to saturate with grain sizes of approximately 1000 nm. It is not necessary to enlarge the grain size beyond the saturation point of the field-effect mobility to improve performance, because the field-effect mobility of an average grain size of 700 nm is limited by phonon scattering, but not by the grain boundary.

We have developed a new silicon (Si) crystallization method that makes it possible to form single-crystalline Si in the channel regions of thin-film transistors (TFTs) on non-alkali glass without introducing thermal damage. The method includes using a frequency-doubled (2!) diode-pumped solid-state (DPSS) Nd:YVO 4 continuous-wave (CW) laser ( ¼ 532 nm). The unique characteristics of this crystallization method are the introduction of a pre-defined thick capping-Si layer on a pre-patterned channel region and laser irradiation from the back surface through the glass substrate. We succeeded in forming 2-mm-wide and 20-mm-long single-crystalline Si in the channel region of a TFT. A high-performance n-channel TFT on a glass substrate was obtained using a 450 C fabrication process. The TFT had a field-effect mobility of 400 cm 2 /Vs, a subthreshold swing of 0.16 V/dec, and a threshold voltage of 0.24 V.