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Large thermal mismatch stress can be introduced in 3D-Integration structures employing Through-Silicon-Via (TSV).The stress distribution in silicon and interconnect is affected by the via diameter and layout geometry. The TSV induced stress changes silicon mobility and ultimately alters device performance. The mobility and performance change differs in nand p-silicon and is a function of the distance to the TSV. In addition, the TSV induced stress acts on the barrier layer, the landing pad, the interconnects, and the dielectrics. The interactions with defects may lead to crack nucleation and growth, and compromise the structure reliability. Furthermore, the material choice that reduces silicon stress for less impact on performance may increase stresses in other regions where reliability is of concern. This paper studies these effects and their dependence on various integration configurations.

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We report the first application of second-harmonic generation (SHG) measurements for the characterization of X-ray radiation damage in Si/SiO 2 structures. The main advantage of this experimental technique is that it is noninvasive, contactless, and sensitive to the electric field at the interface. Interaction of intense 800 nm femtosecond laser pulses with Si/SiO 2 structures results in electron-hole pair creation in the Si, multiphoton carrier injection and second-harmonic generation. The time-dependent second-harmonic (doubled frequency) signal is a measure of the dynamic electric field at the interface. This dynamic field is created and altered by unequal electron-hole injection into the oxide, trapping/detrapping of charges, and carrier recombination processes. We find that the SHG response from Si/SiO 2 samples before and after X-ray irradiation is significantly different. Thus, SHG is a promising technique for the characterization of radiation damage in Si/SiO 2 structures. In particular, SHG is especially useful in characterizing damage in ultrathin oxide layers, for which conventional electrical measurements may not be sufficiently sensitive to the kinds of defects observable via optical methods.

Through-silicon via (TSV) structures with various material and geometry configurations are assessed to study their impact on reliability, isolation and performance. Oxide liner insulators show a larger performance impact as compared to low-k liners and the effect decreases with increasing liner insulator thickness. Higher density of the TSV array causes greater stress impact on carrier mobility and increases the parasitic capacitance. Additionally, low-k liner reduces the parasitic capacitance, but exhibits lower strength and adhesion, therefore degraded reliability. These results provide an important perspective of performance and reliability trade-offs necessary for a robust TSV design.