Random number generation refers to many applications such as simulation, numerical analysis, cryptography etc. Field Programmable Gate Array (FPGA) are reconfigurable hardware systems, which allow rapid prototyping. This research work is the first comprehensive survey on how random number generators are implemented on Field Programmable Gate Arrays (FPGAs). A rich and upto-date list of generators specifically mapped to FPGA are presented with deep technical details on their definitions and implementations. A classification of these generators is presented, which encompasses linear and nonlinear (chaotic) pseudo and truly random number generators. A statistical comparison through standard batteries of tests, as well as implementation comparison based on speed and area performances, are finally presented.

In this paper, radix-2 r arithmetic is applied to the multiple constant multiplication (MCM) problem. Given a number M of nonnegative constants with a bit-length N, we determine the analytic formulas for the maximum number of additions, the average number of additions, and the maximum number of cascaded additions forming the critical path. We get the first proved bounds known so far for MCM. In addition of being fully-predictable with respect to the problem size (M, N), the RADIX-2 r MCM heuristic exhibits a sublinear runtimecomplexity O (M×N/r), where r is a function of (M, N). For highcomplexity problems, it is most likely the only one that is even feasible to run. Another merit is that it has the shortest adderdepth in comparison to the best published MCM algorithms. Index Terms-High-Speed and Low-Power Design, Linear-Time-Invariant (LTI) Systems, Multiplierless Single/MutipleConstant Multiplication (SCM/MCM), Radix-2 r Arithmetic.

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In a recent work, we have introduced a new multiple constant multiplication (MCM) algorithm, denoted as RADIX-2 r. The latter exhibits the best results in speed and power, comparatively with the most prominent algorithms. In this paper, the area aspect of RADIX-2 r is more specially investigated. RADIX-2 r is confronted to area efficient algorithms, notably to the cumulative benefit heuristic (Hcub) known for its lowest adder-cost. A number of benchmark FIR filters of growing complexity served for comparison. The results showed that RADIX-2 r is better than Hcub in area, especially for high order filters where the saving ranges from 1.50% up to 3.46%. This advantage is analytically proved and experimentally confirmed using a 65nm CMOS technology. Area efficiency is achieved along with important savings in speed and power, ranging from 6.37% up to 38.01% and from 9.30% up to 25.85%, respectively. When MCM blocks are implemented alone, the savings are higher: 10.18%, 47.24%, and 41.27% in area, speed, and power, respectively. Most importantly, we prove that MCM heuristics using similar addition pattern (A-operation with the same shift spans) as Hcub yield excessive bit-adder overhead in MCM problems of high complexity. As such, they are not competitive to RADIX-2 r in high order filters.

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