This paper proposes criteria for the verification of behavioral designs for hardware written in VHDL. The criteria are analogous to testing criteria for software, but were adapted to the specific needs and constructs of hardware designs written in VHDL. We examine the potential value of these criteria with respect to desirable properties for evaluation criteria that were originally developed for sofrware. Then we apply the VHDL criteria to several design examples with varying complexities to demonstrate their practical usefulness. Although, applying sofmare testing techniques to hardware design at the behavioral level is not new, this work, to the best of our knowledge, is the first attempt to analyze the approach from the theoretical point of view and to lay the groundwork for achieving error-free design at the behavioral level.
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