In this abstract we present a highly manufacturable, high performance 90nm technology with best in class ,performance for 35nm gate-length N and P transistors. Unique, but simple and low cost, process changes have been utilized to modulate channel stress and implant profile to generate enhanced performance with no additional masks. High drive currents of 1193uAium and 587uAium are obtained for nMOS and PMOS transistors respectively at I .2V Vdd and an Ioff of 60nMpm. An industry leading 90nm technology CVil of 0 . 6 1~s and 1 .
The impact of nitrogen concentration on nitrided gate dielectric scaling has been found to depend on the process conditions used to incorporate nitrogen. For example, the variation in the nitrogen content of gate dielectrics processed at high pressure (>107Pa) has a strong impact on gate leakage current, but not on equivalent oxide thickness. While this effect allows nearly independent control of gate leakage and drive currents of the device, it prevents scaling of the gate dielectric. In contrast, it is found that at low process pressures (<13Pa) the gate dielectric behaves in a more conventional fashion, where both electrical oxide thickness and film leakage change with film nitrogen content. A model is proposed to explain this behavior based on an intrinsic reoxidation process. Chemical bond analysis results are presented to support the proposed model.
Clock Delayed Dual Keeper domino logic style with Static Switching mechanism (CDDK_SS) using delayed enabling of the keeper circuit and modified discharge path has been proposed in this paper. In CDDK domino circuit, the principle of delayed enabling of keeper circuit offers reduced contention between keeper circuit and Pull Down Network (PDN). The modified discharge path at the output node eradicates the switching at the output node for identical TRUE inputs during the pre-charge phase. This facilitates in obtaining static like output in contrast with conventional domino logic. The simulation results of Arithmetic and Logic Unit (ALU) subsystems demonstrate 17.7% reduction in dynamic power consumption while compared to conventional domino logic. Furthermore, 62% enhancement in speed performance has been achieved with good robustness. Design and simulation have been executed using Cadence® Virtuoso, with UMC 90nm technology node library.
Good accuracy in depth profile analyses of nitrogen in ultrathin oxynitride films is desirable for process development and routine process monitoring. Low energy SIMS is one of the techniques that has found success in the accurate characterization of thin oxynitride films. This work investigated the artifacts in a typical depth profile analysis of nitrogen with the current SIMS technique and the ways to improve the accuracy by selecting optimal analytical conditions. It was demonstrated that surface roughness developed rapidly in a SiO 2 /Si stack when it was bombarded with an O 2 + beam at 250 eV and angle of incidence from 70 to 79• . The roughness caused distortion in the measured depth profiles of nitrogen and the major component elements. However, the above roughness and the distortion in the depth profiles can be eliminated by using a 250 eV O 2 + beam at an angle of incidence above 80•
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