Power systems are becoming more interconnected and complex. The distributed generation expands and spreads across the grids, reducing the distance between the load and the generation. In addition, several substations are aging after decades of operation and their equipment struggle to sustain the ever increasing fault levels. In this context, the fault current limiter (FCL) arrived as a solution to mitigate this problem. Considering the FCL devices, the resistive superconducting FCL (R-SFCL) is the most mature technology with potential to be produced in mass scale, due to its ability to quickly change its impedance during a fault current and its high current density capacity. In this paper, a novel R-SFCL topology is presented, which has an unique design that allows a compact size and the possibility of modulated assembly. These characteristics enable setups for various voltage and current levels. One advantage of this topology is the compromise between volume and high heat exchange that can reduce the recovery time under load. One bench prototype was modeled using the thermal–electrical analogy implemented in ATPDraw, tested in two different labs. Tests were performed at faults levels of 12 kA
peak
, 5 kA
rms
and 2.7 kA
rms
for 137 V. Measured and simulated results were compared, resulting in a relative error of less than 12%. Two contributions can be highlighted: the new design of the R-SFCL and the inclusion in the convection heat exchange model curves for the heating (during the quench) and cooling (after fault), which allows to predict the recovery under load.
Fault current limiters are essential devices used to protect the power system and its equipment against high levels of fault current, which are growing up due to the increase of new power sources. This paper proposes a novel design of a Hybrid Superconducting Fault Current Limiter (Hybrid SFCL), which is composed basically by thyristors in series with a superconducting element. This branch is connected in parallel to an air-core reactor, which improves limitation and ensures the safe operation of the superconductor element. Another advantage of this topology is the use of the voltage drop in the superconductor as an input parameter to the controller. This voltage is used to detect the fault, which avoids the need for a current sensor and, consequently, reduces the manufacturing costs. In this work, the PSCAD/EMTDC software was employed to modeling the Hybrid SFCL and the 2G superconducting tape, which was modeled considering the thermal-electrical analysis. The results show that the fault current is efficiently limited, and the developed controller strategy has shown a relatively good performance. Furthermore, the proposed system guarantees a fast recovery time, in the order of 500 ms, which is a good advantage when compared to the conventional resistive SFCL.
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