Through custom test pattern generation and SRAM design analysis, we present the first demonstration of Laser Voltage Imaging (LVI) and Probing (LVP) for the successful fault isolation and physical analysis of DQ failures within a 14nm SRAM macro. These findings revealed the fail site to reside within the I/O circuitry of the associated failing pin, a previously overlooked location as common block failures are typically associated with physical anomalies within the SRAM periphery.
We describe here the first demonstration of 14nm silicon device characterization using 1.55-2µm emission microscopy as a technique to interrogate the radiative properties of various physical defects. A study is presented and discussed for cases highlighting photo-emission only, hybrid photo-thermal-emission, and thermal-emission only.
Advances in semiconductor manufacturing technologies have led to newer types of defects that are difficult to identify, causing longer yield ramp times. Traditionally, yield has been limited to random particle defects but layout systematic defects are increasingly dominating the fail paretos on advanced technologies. Identifying systematic defects precisely and rapidly is a must. This paper codifies a methodology that combines volume scan diagnosis and non-destructive electrical fault isolation techniques such as photon-emission microscopy, soft defect localization and laser voltage imaging/probing to debug manufacturing defects precisely.
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