A single Langmuir probe technique has been used to measure the electron energy distribution function (EEDF) in an RF (13.56 MHz)-generated argon plasma in a reactive ion etcher. This was achieved by applying a driving RF signal to the probe to compensate for the effects of RF fluctuations in the plasma potential and then using the second differential of the probe characteristics to obtain the EEDF. It is observed that the EEDF is not well represented by a Maxwellian, Optical emission spectra (4600-4900 AA) were also recorded. In argon plasmas, generated at a constant power level, the average electron energy deduced from the Langmuir probe increases as the pressure is reduced below 20 mTorr. At 5 mTorr the average energy is 8.5 eV whereas above 20 mTorr the average energy lies in the range 3.5-5.3 eV. This is found to correlate with the variation in the intensity of an emission line (4s'(1/2)10 from 5p(1/2) at 4702.32 AA) in an excited argon atom, which can be accounted for by the presence of an increasing fraction of higher-energy electrons at lower gas pressures.

A graphite capping layer has been evaluated to protect the surface of patterned and selectively implanted 4H-SiC epitaxial wafers during post-implantation annealing. AZ-5214E photoresist was spun and baked in vacuum at temperatures ranging from 750 to 850 • C to form a continuous coating on both planar and mesa-etched SiC surfaces with features up to 2 µm in height. Complete conversion of the hydrogenated polymer-like film into nanocrystalline graphite layer was verified by Raman spectroscopy. The graphite capping layer remained undamaged and protected both planar and mesa-etched SiC surfaces during subsequent annealing in argon ambient at temperatures up to 1650 • C for 30 min. It effectively suppressed step bunching and dopant out-diffusion in implanted regions and simultaneously ensured that the un-implanted surface of the 4H-SiC epitaxial wafer remained free of contamination. Schottky barrier diodes formed on the un-implanted annealed surfaces displayed almost ideal characteristics. List of symbolsvacuum permittivity, 8.854 18 × 10 −14 A * (A (cm K) −2 ) effective Richardson constant, 146 N D (cm −3

High-mobility materials and non-traditional device architectures are of key interest in the semiconductor industry because of the need to achieve higher computing speed and low power consumption. In this article, we present an integrated approach using directed self-assembly (DSA) of block copolymers (BCPs) to form aligned line-space features through graphoepitaxy on germanium on insulator (GeOI) substrates. Ge is an example of a high mobility material (III–V, II–VI) where the chemical activity of the surface and its composition sensitivity to etch processing offers considerable challenges in fabrication compared to silicon (Si). We believe the methods described here afford an opportunity to develop ultrasmall dimension patterns from these important high-mobility materials. High-quality metal oxide enhanced pattern transfer to Ge is demonstrated for the realization of nanofins with sub-10 nm feature size. Graphoepitaxial alignment of a poly­(styrene)-block-poly­(4-vinylpyridine) (PS-b-P4VP) BCP was achieved using predefined hydrogen silsesquioxane (HSQ) topography at a GeOI substrate. Subsequent impregnation of the aligned BCP templates with a salt precursor in situ and simple processing was used to generate robust metal oxide nanowire (e.g., Fe3O4, γ-Al2O3, and HfO2) hardmask arrays. Optimized plasma based dry etching of the oxide modified substrate allowed the formation of high aspect ratio Ge nanofin features within the HSQ topographical structure. We believe the methodology developed has significant potential for high-resolution device patterning of high mobility semiconductors. We envision that the aligned Ge nanofin arrays prepared here via graphoepitaxy might have application as a replacement channel material for complementary metal–oxide–semiconductor (CMOS) devices and integrated circuit (IC) technology. Furthermore, the low capital required to produce Ge nanostructures with DSA technology may be an attractive route to address technological and economic challenges facing the nanoelectronic and semiconductor industry.

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