This paper presents a Built-In-Self-Test (BIST) implementation of pseudo-random testing for Micro Electro-Mechanical Systems (MEMS). The technique is based on Impulse Response (IR) evaluation using Maximum-Length Sequences (MLS). We will demonstrate the use of this technique and move forward to find the signature that is defined as the necessary samples of the impulse response needed to carry out an efficient test. We will use Monte-Carlo simulations to find the set of all fault-free devices under test (DUT). This set defines the impulse response space and the signature space. A DUT will be judged faultfree according to its signature being inside or outside the boundaries of the signature space. Finally, the test quality will be evaluated as function of the probabilities of false acceptance and false rejection, yield and percentage of test escapes. According to these test metrics, the design parameters (length of the MLS and the precision of the analogue to digital converter ADC) will be derived.
In Spatial Multiplexing MIMO systems, many powerful non-linear detection techniques as sphere decoding have emerged to overcome the performance limitations of linear detection techniques. However, these non-linear techniques suffer from high complexity that increases dramatically with the number of antennas and the modulation order. Hence, they cannot be implemented on highly parallel hardware architecture and are thus not suitable for real-time high data rate transmission. In this paper, a new detection technique is proposed to approach the optimal performance obtained by Maximum Likelihood (ML) detector without increasing the complexity significantly. This detector is denoted by OSIC-ML since it combines two techniques: the Ordered Successive Interference Cancellation (OSIC) and the ML. The proposed OSIC-ML detector shows a near-optimal performance at very low complexity even with large scale MIMO and imperfect channel estimation, where this complexity can be efficiently controlled to achieve the desired complexity-performance tradeoff.
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