Yield enhancement challenges for 90 nm and beyond

Goel, Honey; Dance, D.

doi:10.1109/asmc.2003.1194504

Cited by 24 publications

(10 citation statements)

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“…Generally speaking, deviation of wafer final test (WFT) yields from those predicted by yield models based on IC critical area [2,3] (which typically predict yields based on random defects) reflects the presence of sys tematic defects. Besides the aforementioned design marginal ities, systematic defects may be caused by a variety of other reasons, including but not limited to, tool excursions, design process interactions, test issues, mask errors and parametric variations [4,5] Regardless of the cause, what matters ultimately in highvolume manufacturing is product yields. Manufacturing suc cess is predicated by the ability to quickly identify, quantify and eliminate systematic defects.…”

Section: Introductionmentioning

confidence: 99%

Hard to find, easy to find systematics; just find them

Desineni

Pastel

Kassab

et al. 2010

2010 IEEE International Test Conference

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In a manufacturing organization, every morning starts with the question: what is the yield today? The cost of wafer manufacturing being fairly constant, product yield is one of the most significant variables for profitability. With the yield paretos increasingly dominated by systematic defects, yield learning based on product test is fast becoming a fundamen tal requirement. For an integrated device manufacturer like IBM, product-based yield learning is even more critical as this drives technology learning as well. In this paper, we will present some of IBM's yield learning techniques and several case studies from high-volume manufacturing. These tech niques extend from test data analysis, to analysis of scan based product diagnosis results, to detailed layout analysis in conjunction with test, diagnosis and inline defect inspection data. We will discuss the increasing levels of complexity asso ciated with the various techniques and argue that an effective yield learning strategy must comprise all of the above.

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Section: Introductionmentioning

confidence: 99%

Hard to find, easy to find systematics; just find them

Desineni

Pastel

Kassab

et al. 2010

2010 IEEE International Test Conference

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“…In short, while dielectric erosion has been extensively studied [9]- [12], practical, quantitative understanding of the dishing effect is still at the development stage. In particular as a prerequisite, the availability of fast, nondestructive full-profile metrology will aid the process modeling and yield improvement efforts [13]. With rapid technology scaling and increasingly tighter time-to-market budgets, it is crucial to develop supporting metrology to meet the objectives at 65-nm technology generation and beyond.…”

Section: Introductionmentioning

confidence: 99%

Dishing-Radius Model of Copper CMP Dishing Effects

Spanos

2005

IEEE Trans. Semicond. Manufact.

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Copper chemical-mechanical polishing (CMP) dishing concerns semiconductor manufacturing yield in contemporary back-end-of-the-line process. In this work, we first propose and validate a dishing model through first-principle analysis and carefully designed experimentation. This model utilizes the novel concept of dishing radius, a metric that assumes cylindrically shaped post-CMP copper surface and directly captures the extent of metal dishing for a CMP process. Additionally, a dishing-model-based method for extracting the parameterized two-dimensional post-CMP metal profile is developed for damascene structures. The case study utilizing this method shows that the extracted parameters are in good agreement with those from cross-sectional scanning electron microscopy and surface profilers, which confirmed that dishing radius is linewidth-independent for typical metal lines. This method is particularly useful in determining dishing artifacts, which are modeled using the dishing radius concept. The approach is nondestructive, precise, and efficient.

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“…Unfortunately random particle related yield is the only mature aspect of the yield prediction work available in tools and in the literature [1,3]. However, for advanced semiconductor processes, other largely unaddressed yield loss components such as systematic and parametric ones are beginning to dominate the total yield loss [5,10]. For example, chemical mechanical polishing (CMP) induced yield loss and lithography printability induced yield loss, are two of the most significant systematic yield loss components.…”

Section: Introductionmentioning

confidence: 99%

Hotspot Based Yield Prediction with Consideration of Correlations

Chiang

Kawa

2008

9th International Symposium on Quality Electronic Design (Isqed 2008)

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Design for manufacturability and yield has becomes a major issue for advanced VLSI technology nodes. The demand for a yield prediction capability has been growing significantly. Unfortunately, systematic yield prediction and analysis is still behind in both research and availability of commercial tools. A major reason for that is the high dependency of such research on hard to come by data from fabs. Thus a new approach that limits this dependency is needed. In this paper, we propose a novel and practical approach that enables systematic yield prediction with limited fab information and data. This approach is based on the information of hotspot definitions and their yield scores. The required inputs are more practical and realistic and less confidential. The dependency on the fab data is minimal. In this approach, we propose an algorithm that properly incorporates spatial correlations between yield variables when computing full chip total yield. The predicted total yield score is accurate and robust. We further demonstrate the high level of accuracy by both theory and simulation.

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Yield enhancement challenges for 90 nm and beyond

Cited by 24 publications

References 0 publications

Hard to find, easy to find systematics; just find them

Hard to find, easy to find systematics; just find them

Dishing-Radius Model of Copper CMP Dishing Effects

Hotspot Based Yield Prediction with Consideration of Correlations

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