Write Disturbance Modeling and Testing for MRAM

Su, Chao‐Ton; Tsai, Chih-Wea; Wu, Cheng‐Wen; Hung, Chien‐Ching; Chen, Young-Shying; Wang, Ding-Yeong; Lee, Yuan-Jen; Kao, Ming-Jer

doi:10.1109/tvlsi.2007.915402

Cited by 18 publications

(5 citation statements)

References 23 publications

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“…Several works are centered on the analysis and detection of resistive defects by exploiting a traditional memory fault analysis. Most of the work dedicated to test and design for test of MRAMs are specific to conventional, toggle, or thermally assisted MRAMs . The proposed test techniques are mainly targeting the WDF that can occur with high probability in these memory devices.…”

Section: Testing Methodologiesmentioning

confidence: 99%

State of the art and challenges for test and reliability of emerging nonvolatile resistive memories

Vatajelu

Pouyan

Hamdioui

2017

Circuit Theory & Apps

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Summary The power and reliability issues of today's memories (static and dynamic RAMs) reduce the advances achieved by their implementation in scaled technology. There are several emergent memory technologies that address the technical constraints of today's memories, among which the most promising solutions are the resistance‐based memories, such as phase change memories, the redox‐based resistive memories, and the spin‐transfer torque magnetic memories. These technologies are facing various challenges that have to be addressed to render them efficient in today's applications. Until recently, research focus was on the design for performance and power efficiency, but lately, the test and reliability issues of these devices have become of major concern to the community. This paper presents an overview of the challenges and proposed test and reliability boost solutions developed to suit the needs of the emerging memories under analysis. It underlines (1) the unique faults that occur in the memory cell due to known issues in the emerging storage devices, (2) the dedicated solutions developed for efficient testing of the emerging memories under study, (3) the main reliability concerns related to the emerging storage devices, and (4) the design solutions targeted at mitigating these reliability issues. Copyright © 2017 John Wiley & Sons, Ltd.

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Section: Testing Methodologiesmentioning

confidence: 99%

State of the art and challenges for test and reliability of emerging nonvolatile resistive memories

Vatajelu

Pouyan

Hamdioui

2017

Circuit Theory & Apps

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“…The only study about Toggle-MRAM fault modeling and testing was presented in [62], [70], and [71]. In these articles, the authors first performed a classification and analysis of defects and their behavior and proposed corresponding fault models [62].…”

Section: A Test Solutions For Toggle-mrammentioning

confidence: 99%

“…In their subsequent study, the authors presented chip measurement results to prove the existence of write disturbance faults [70], [71]. They proposed the WDF model for toggle MRAM to represent the behavior of faults that affect data stored in MRAM cells when an excessive magnetic field is applied during the write operation on the neighboring cells.…”

Section: A Test Solutions For Toggle-mrammentioning

confidence: 99%

A Survey of Test and Reliability Solutions for Magnetic Random Access Memories

et al. 2021

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| Memories occupy most of the silicon area in nowadays' system-on-chips and contribute to a significant part of system power consumption. Though widely used, nonvolatile Flash memories still suffer from several drawbacks. Magnetic random access memories (MRAMs) have the potential to mitigate most of the Flash shortcomings. Moreover, it is predicted that they could be used for DRAM and SRAM replacement. However, they are prone to manufacturing defects and runtime failures as any other type of memory. This article provides an up-to-date and practical coverage of MRAM test and reliability solutions existing in the literature. After some background on existing MRAM technologies, defectiveness and reliability issues are discussed, as well as functional fault models used for MRAM. This article is dedicated to a summarized description of existing test and reliability improvement methods developed Manuscript

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“…There are several works in literature dealing with resistive defects. Examples are resistive opens, resistive shorts and bridges [111,112,115], as well as defects leading to large parameter variability [111,113,114,115,116,117]. Most of these works focus on the defect, fault modelling, and test of Toggle-MRAM and TAS-MRAM memories.…”

Section: Defectsmentioning

confidence: 99%

“…Several works are centred on the analysis and detection of resistive defects by exploiting a traditional memory fault analysis. Most of the work dedicated to test and design for test of MRAMs are specific to conventional, toggle or thermally assisted MRAMs [112,114]. The proposed test techniques are mainly targeting the WDF which can occur with high probability in these memory devices.…”

Section: Test and Design-for-testmentioning

confidence: 99%

Challenges and Solutions in Emerging Memory Testing

Vatajelu

Prinetto

Taouil

et al. 2019

IEEE Trans. Emerg. Topics Comput.

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International audienceThe research and prototyping of new memory technologies are getting a lot of attention in order to enable new (computer) architectures and provide new opportunities for today’s and future applications. Delivering high quality and reliability products was and will remain a crucial step in the introduction of new technologies. Therefore, appropriate fault modelling, test development and design for testability (DfT) is needed. This paper overviews and discusses the challenges and the emerging solutions in testing three classes of memories: 3D stacked memories, Resistive memories and Spin-Transfer-Torque Magnetic memories. Defects mechanisms, fault models, and emerging test solutions will be discussed

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Write Disturbance Modeling and Testing for MRAM

Cited by 18 publications

References 23 publications

State of the art and challenges for test and reliability of emerging nonvolatile resistive memories

State of the art and challenges for test and reliability of emerging nonvolatile resistive memories

A Survey of Test and Reliability Solutions for Magnetic Random Access Memories

Challenges and Solutions in Emerging Memory Testing

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