Worst case total dose radiation response of 0.35 /spl mu/m SOI CMOSFETs

Worst-case bias during total dose irradiation of SOI transistors

“…The buried oxide isolation and the small volume of silicon present many advantages for speed, density, and transient irradiation [4]. But, unless radiation hardened [5], the buried oxide also induces total dose leakage currents [6].…”

“…[5] for 0.35pm gate length transistors processed on standard SIMOX. Extrapolation to other gate lengths and buried oxide thicknesses has only been studied with device simulation without modeling the dose induced charge trapping in the buried oxide.…”

Influence of total-dose radiation on the electrical characteristics of SOI MOSFETs

“…Therefore, the electric field condition that results in the maximum back-gate threshold-voltage shift in an SOI transistor is the condition that causes the most radiation-induced hole trapping near the back Si/SiO 2 interface underneath the body region. Liu et al [46], and subsequently Ferlet-Cavrois et al [47], have simulated the electric field distributions in the buried oxide for numerous radiation bias conditions for partially-depleted SOI transistors. The bias configuration that results in the largest back-gate threshold-voltage shifts depend on the ratio of the transistor gate length to the buried oxide thickness Fig.…”

Total dose radiation induced changes of the floating body effects in the partially depleted SOI NMOS with ultrathin gate oxide

“…The radiation source was 60 Co γ-ray and the dose rate was about 200 rad(Si)/s. During radiation exposure, the devices were under Transfer-Gate (TG) bias condition that the drain and source terminals were biased at 1.2V and other terminals were grounded, which is the worst radiation bias condition for BOX [14]. Before and shortly after the irradiation, the direct-current (DC) and LF noise characteristics were measured at room temperature by the 1/f noise Measurement System which is composed of E4725AK01 Controller, E4725AK02 Resistor and E4725AK03 Dut.…”