Wideband harmonic‐tuned CMOS power amplifier with 19.5 dBm output power and 22.6% PAE over entire X‐band

Park, Seungwon; Jeon, Sanggeun

doi:10.1049/el.2014.4541

Cited by 10 publications

(4 citation statements)

References 4 publications

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“…In order to extend the bandwidth, improve stability and linearity, various feedback techniques have been employed in broadband designs, 27,28 and double resonance (DR) technique is also used for band expansion. 29,30 However, according to the analysis of traditional double resonance technique, the return loss and gain performance can hardly be guaranteed. In this work, LC connected dual resonant (LCDR) network is proposed to extend bandwidth, improve the impedance matching and out-band rejection in a qualitative way.…”

Section: Introductionmentioning

confidence: 99%

A power amplifier with bandwidth expansion and linearity enhancement in 130 nmcomplementary metal‐oxide‐semiconductorprocess

Cao

Liu

et al. 2021

Int J RF Microw Comput Aided Eng

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A power amplifier with bandwidth expansion and linearity enhancement in 130 nm complementary metal-oxide-semiconductor (CMOS) process is presented. A LC connected dual-resonant network is proposed to achieve good broadband performance and high out-band rejection capability simultaneously. Furthermore, the advanced multiple-gated transistor technique is employed to cancel out odd-order intermodulation and harmonic distortions. The PA is implemented in 130 nm CMOS process with an area of 1.17 mm × 0.92 mm.Measurement results demonstrate that the PA exhibits a peak power gain of 8 dB with a relative bandwidth of 38% while maintaining a low reflection coefficient of −23.2 dB, maximum saturation output power of 15.6 dBm, maximum OP1dB and OIP3 of 14.3 dBm and 19 dBm, and a peak power added efficiency of 21.3%, respectively. In addition, an out-band rejection of 20 dB and 23.2 dB at 6.1 GHz and 14 GHz are measured.

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Section: Introductionmentioning

confidence: 99%

A power amplifier with bandwidth expansion and linearity enhancement in 130 nmcomplementary metal‐oxide‐semiconductorprocess

Cao

Liu

et al. 2021

Int J RF Microw Comput Aided Eng

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“…Many types of wideband PA have been proposed in published articles [1][2][3][4][5][6][7][8][9][10][11] . A stacked technique using the SOI process could achieve wideband power amplifier design, but it cannot integrate with the bulk CMOS process, and it is not suitable for single-chip integration [1] .…”

Section: Introductionmentioning

confidence: 99%

An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS

Gong

et al. 2018

J. Semicond.

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A wideband CMOS power amplifier with high gain and excellent gain flatness for X–Ku-band radar phased array is proposed in this paper. Excellent gain flatness is achieved with transformer based matching networks (TMNs), in which the gain fluctuation of an inter-stage matching network can be compensated by the proposed design methods. The circuit is fabricated in the TSMC 65 nm RF CMOS process. The proposed technique is verified by the measurement results, which show that the wideband PA achieves gain of 21–22.5 dB with only ±0.75 dB gain fluctuation and 13–14.6 dBm flat output power between 7.5 and 15.5 GHz, and a little more ripple in the rest of the X–Ku band due to the inaccuracy of passive modelling at high frequency. The circuit delivers saturated and 1 dB-compressed output power of 14.6 and 11.3 dBm respectively at 13 GHz, for a maximal power-added efficiency (PAE) of 23%.

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“…To realize fully‐integrated RF front‐ends, CMOS based power amplifiers are necessary. In tandem with recent advances in CMOS technology, many advances in the development of CMOS power amplifiers have been introduced . In particular, nonlinear CMOS power amplifiers using voltage combining methods have been actively studied .…”

Section: Introductionmentioning

confidence: 99%

2.4‐GHz CMOS linear power amplifier for IEEE 802.11N WLAN applications

Yoo

Lee

Kang

et al. 2017

Micro & Optical Tech Letters

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In this work, we design a linear CMOS power amplifier with a spiral‐type output transformer for IEEE 802.11n WLAN applications. We conduct studies to identify the proper output transformer and power stage structures for linear CMOS power amplifiers. The power amplifier is composed of a single differential‐pair for the power stage to mitigate the stability problems that frequently arise in high gain linear power amplifiers. Additionally, we investigate the output matching network using a spiral‐type output transformer to minimize the output return loss. To verify the feasibility of the power amplifier, we designed a 2.4‐GHz power amplifier with a 180‐nm SOI CMOS process. The designed power amplifier is measured using an IEEE 802.11n WLAN signal. The power amplifier achieves 21.28 dBm output power while the measured EVM satisfies the standard for 802.11n applications. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:546–550, 2017

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Wideband harmonic‐tuned CMOS power amplifier with 19.5 dBm output power and 22.6% PAE over entire X‐band

Cited by 10 publications

References 4 publications

A power amplifier with bandwidth expansion and linearity enhancement in 130 nmcomplementary metal‐oxide‐semiconductorprocess

A power amplifier with bandwidth expansion and linearity enhancement in 130 nmcomplementary metal‐oxide‐semiconductorprocess

An 8–18 GHz power amplifier with novel gain fluctuation compensation technique in 65 nm CMOS

2.4‐GHz CMOS linear power amplifier for IEEE 802.11N WLAN applications

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