Wet processes deposition for HAR TSV metallization using electroless Co liner and alkaline Cu seed layer

Qiu, Lina; Ni, Zi-Hong; Qu, Xin-Ping

doi:10.1109/iitc52079.2022.9881295

Cited by 2 publications

(1 citation statement)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, careless copper electroplating can cause various defects in the copper filling [2]. A successful copper electroplating into a 4 × 50 µm 2 TSV with an aspect ratio > 10:1 has recently been shown by Qiu et al [112]. They used a TiN barrier layer followed by an electroless Co layer.…”

Section: Cu-electroplatingmentioning

confidence: 99%

Advanced 3D Through-Si-Via and Solder Bumping Technology: A Review

Jang,

Sharma,

Jung

2023

Materials

View full text Add to dashboard Cite

Three-dimensional (3D) packaging using through-Si-via (TSV) is a key technique for achieving high-density integration, high-speed connectivity, and for downsizing of electronic devices. This paper describes recent developments in TSV fabrication and bonding methods in advanced 3D electronic packaging. In particular, the authors have overviewed the recent progress in the fabrication of TSV, various etching and functional layers, and conductive filling of TSVs, as well as bonding materials such as low-temperature nano-modified solders, transient liquid phase (TLP) bonding, Cu pillars, composite hybrids, and bump-free bonding, as well as the role of emerging high entropy alloy (HEA) solders in 3D microelectronic packaging. This paper serves as a guideline enumerating the current developments in 3D packaging that allow Si semiconductors to deliver improved performance and power efficiency.

show abstract

Section: Cu-electroplatingmentioning

confidence: 99%