Waveguide Diplexer: Design and Analysis for 5G Communication

Sharma, Manvinder; Singh, Sohni; Khosla, Dishant; Goyal, Sumeet; Gupta, Anuj

doi:10.1109/pdgc.2018.8745914

Cited by 16 publications

(3 citation statements)

References 19 publications

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“…This design followed some effective approaches such as impedance matching optimization, multiple resonance and increasing the substrate thickness which results in the reduced substrate permittivity. The substrate of high dielectric constant is used which reduced the radiation losses [17]. A CPW fed design microstrip patch antenna is designed for 5G technology with operating frequency of 8.4 GHz WSN, WLAN, Hyper LAN and Wi-Fi technology.…”

Section: A 5g Related Millimeter Wave (Mmw) Microstrip Patch Antennamentioning

confidence: 99%

Investigations on Millimeter Wave (mmW) Antenna for 5G Technology: Design Considerations and Applications

et al. 2020

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The millimeter wave technology has made its way to the 5G technology as the system of 5G requires larger bandwidth, higher frequency and system capacity. In order to achieve these parameters, the millimeter wave antenna research becomes necessary. The current wireless technologies require huge bandwidth which makes the spectrum of millimeter wave a potential candidate. Microstrip antennas have always been in an increasing demand due to their exceptional performance in the applications of wireless communication. The advantages of microstrip patch antenna led to its popularity among the researchers.The technologies such as MIMO, CMOS and beam forming are used with millimeter wave antenna for improving the mobile phone performance. There are various designs of microstrip patch antenna related to 5G technology and applications in the millimeter wave band which are discussed in the paper.

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Section: A 5g Related Millimeter Wave (Mmw) Microstrip Patch Antennamentioning

confidence: 99%

Investigations on Millimeter Wave (mmW) Antenna for 5G Technology: Design Considerations and Applications

et al. 2020

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“…Due to tunneling current through gate oxide insulator, gate oxide leakage power is another contributor to leakage power. For nano scale gate oxide leakage is comparable to subthreshold leakage power [5][6]. For reducing this oxide leakage current high k dielctric materials can be used.…”

Section: Figure 1 Subthreshold Leakage Of Nmosmentioning

confidence: 99%

Implementation and modeling of low power sleepy stack SRAM cell

Kakkar¹,

Goyal²,

Singh³

et al. 2019

CGCIJCTR

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for the future technologies in which the devices and circuits are integrating more, low power consuming devices are needed. Mostly the reduction of power dissipation work is concentrated on switching and leakage current. However sub threshold current is also a big factor which leads to power consumption especially for memories. In this paper, leakage power of SRAM memory cell is reduced by power gated sleepy stack structure which leads to lesser power dissipation. The power dissipation is reduced to 226 µW with proposed technique compared with power dissipation of conventional 6T SRAM cell which had 740 µW. With lesser power dissipation the circuit can have more battery backup and lesser heat emission

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“…Many methodology, architecture and ideas has been proposed by researchers architecture level to device level but there is always a tradeoff between delay, area and power. So, according to the need of product or design the designer has to choose the appropriate technique [1][2][3][4]. Complementary metal oxide semiconductor (CMOS) has been used mostly for the VLSI designs.…”

Section: Introductionmentioning

confidence: 99%

Implementation and Modeling of Low Power Sleepy Stack Sram

Kakkar¹

2022

joas

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For the future technologies in which the devices and circuits are integrating more, low power consuming devices are needed. Mostly the reduction of power dissipation work is concentrated on switching and leakage current. However, sub threshold current is also a big factor which leads to power consumption especially for memories. In this paper, leakage power of SRAM memory cell is reduced by power gated sleepy stack structure which leads to lesser power dissipation. The power dissipation is reduced to 226 µW with proposed technique compared with power dissipation of conventional 6T SRAM cell which had 740 µW. With lesser power dissipation the circuit can have more battery backup and lesser heat emission

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Waveguide Diplexer: Design and Analysis for 5G Communication

Cited by 16 publications

References 19 publications

Investigations on Millimeter Wave (mmW) Antenna for 5G Technology: Design Considerations and Applications

Investigations on Millimeter Wave (mmW) Antenna for 5G Technology: Design Considerations and Applications

Implementation and modeling of low power sleepy stack SRAM cell

Implementation and Modeling of Low Power Sleepy Stack Sram

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