Waferstepper Alignment for MEMS Applications using Diffraction Gratings

Abstract

MEMS manufacturing in general and the litho step in particular could benefit tremendously from an enhanced focus range of waferstepper alignment systems. This would help the MEMS community to cope with large substrate topography or extreme thick resist films. In this study the performance range over which of the alignment system of an ASML PAS5000/50 system operates has been investigated.A test device that requires bulk micro machining was designed and processed. The required front to backwafer alignment (FTBA) was performed on alignment markers in cavities etched through a 100mm wafer. On the test device the FTBA overlay was measured electrically as well as optically using the metrology capability of the stepper alignment system. The results obtained demonstrate the capabilities of an existing alignment system to deal with high topographies. The overlay errors observed were dominated by the bulk micro machining processing.

From 2D Lithography to 3D Patterning

“…Although wafersteppers are not designed for alignment on non-planar 3D like substrates it is shown that a waferstepper alignment system, based on phase gratings is fully functional in a wide range of processes used in 3D device fabrication. On an ASML PAS5000 waferstepper, used in this work, an overlay accuracy of 0.3 Pm (3V) or better was obtained in processes with 500 Pm out-offocus alignment [4].…”

“…The FTBA overlay accuracy is usually less accurate, for an ASML PAS5500 waferstepper, 200 nm (3V) is specified [6]. Although projection aligners are not specifically designed for alignment on non-planar 3D like substrates, a 3V overlay accuracy of 0.3 Pm or better was obtained with an ASML PAS5000 waferstepper for up to 500 Pm out-of-focus alignment [7]. The effect of some typical 3D integration processes on the overlay performance is given in table I.…”

“…This all can have consequences for the overlay accuracy. Using mirror symmetric alignment markers [22], the substrate distortion in waferbonding and thinning processes can be characterized employing the waferstepper as a measurement tool [23,24], the process is summarized in figure 6a and 6b. A silicon wafer is patterned with layer 1 of an overlay test pattern like in figure 3.…”

Characterization of front- to backwafer bulk micromachining using electrical overlay test structures

“…Front-to backwafer alignment is performed through the wafer, resulting in an alignment focus offset of 520 µm. An alignment system based on phase gratings such as in the ASML PAS5000/50 waferstepper is capable of aligning over such large focus offsets [3].…”