Voltage- and temperature-dependent gate capacitance and current model: application to ZrO/sub 2/ n-channel MOS capacitor

Abstract

Based on the energy-dispersion relation in each region of the gate-dielectric-silicon system, a tunneling model is developed to understand the gate current as a function of voltage and temperature. The gate capacitance is self-consistently calculated from Schrödinger and Poisson equations subject to the Fermi-Dirac statistics, using the same band structure in the silicon as used for tunneling injection. Franz two-band dispersion is assumed in the dielectric bandgap. Using a Wentzel-Kramer-Brillouin (WKB)-based approach, direct and Fowler-Nordheim (FN) tunneling and thermionic emission are considered simultaneously. The model is implemented for both the silicon conduction and valence bands and both gate-and substrate-injected currents. ZrO 2 NMOSFETs were studied through temperature-dependent -and -simulations. The extracted band gaps and band offsets of the ZrO 2 -and interfacial-Zr-silicate-layer are found to be comparable with the reported values. The gate currents in ZrO 2 -NMOSCAPs are found to be primarily contributed from the silicon conduction band and tunneling appears to be the most probable primary mechanism through the dielectric. Oscillations of gate currents and kinks of gate capacitance were observed near flat-band in the experiments. These phenomena might be caused by the interface states.Index Terms-High-K gate dielectric, leakage currents, MIS devices, MOSFETs, semiconductor device modeling, tunneling.

Structural and resistance switching properties of ZnO/SrTiO3/GaAs heterostructure grown by laser molecular beam epitaxy

“…By contrast, in our case, the disappearance of the hysteresis can be considered as disappearance of the Schottky barrier at a low temperature. This is somewhat similar to the temperaturedependent I-V curve in other systems of metal-oxidesemiconductor structures, such as Al/ HfO 2 / SiO 2 / p-Si, 24 TaN/ ZrO 2 / SiO 2 / p-Si, 25 etc. These temperature-dependent I-V behaviors always show similar performances by inducing an interfacial layer.…”

Efficient Gate Capacitance and Current Modeling of High-k Gate Stacks

“…9. The extracted HfO 2 thickness and other properties agree well with its measurements and available literature (39).…”

Analysis of Interface States in LaSixOy Metal–Insulator–Semiconductor Structures

“…The hump characteristic in MIS capacitors with high-k dielectrics has been reported by some groups. 13,27,28,[34][35][36][37]…”