VLSI reliability: Contributions from a three year national research program

Abstract

The continuous trend to further I.C. miniaturization implies increased local electric field strength and power dissipation density, and a perverse scaling, behaviour of metal interconnections and contacts. This will result in new failure mechanisms while old ones, non under control, may become a threat again. This work reports on the most relevant results, related to VLSI reliability, obtained by the seven University Research Teams involved in a three years Research Program sponsored by the Italian Ministero Pubblica Istruzione. In particular new methods to investigate electromigration and to localize latch‐up phenomena have been successfully developed. Also test and diagnosis techniques to analyze faults in digital I.C. with emphasis on ECL and custom VLSI have been studied, and electromagnetic interference effects, in operational amplifiers have been modelled and simulated.