VLSI implementation of real-time parallel DCT/DST lattice structures for video communications

Chiu, C.T.; Kolagotla, R.K.; Liu, K.J.R.; JáJá, Joseph F.

doi:10.1109/vlsisp.1992.639177

Cited by 3 publications

(4 citation statements)

References 8 publications

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“…3. The overall architecture design is completed by a simple weighted-sum circuit that evaluates (7). We can observe that this architecture consists of M two-tap FIR filters and a M x M weighted interconnection network with M feedback loops.…”

Section: A Lattice Architecture Design For Mapping Operatorsmentioning

confidence: 99%

“…Finally, an important consequence of the periodical reseting we mentioned above is the elimination of the accumulated round-off error. In this way, limit cycles and other problems of numerical nature associated with the use of finite wordlength in the recursive structure are avoided [23], [7]. The algorithm design procedure suggested in Sections 111-C and 111-E, along with the cost figures in Table I, can be used as design guides.…”

Section: Implementing Sliding and Block Transformsmentioning

confidence: 99%

“…In case these conditions are not met, look ahead techniques [32], [33] should be used to improve the speed with the trade-off of complexity. An instance of this trade-off is discussed in [7]. In Table 11, operator counts are also specified.…”

Section: Implementing Sliding and Block Transformsmentioning

confidence: 99%

“…This has been clearly demonstrated recently for a number of individual examples, DCT being the most prevalent among them. Descriptions of the architecture details, complete VLSI layout floor plans, discussions on the finite word-length implementation effects, as well as comparisons with competent techniques have been provided [8], [22], [7], [5], [30]. Furthermore, the time-recursive architectures are very efficient for separable multidimensional data transforms.…”

Section: Introductionmentioning

confidence: 99%

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Time-recursive computation and real-time parallel architectures: a framework

Frantzeskakis

Baras

Liu

1995

IEEE Trans. Signal Process.

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The time-recursive computation has been proven a particularly useful tool in real-time data compression, in transform domain adaptive filtering, and in spectrum analysis. Unlike the FFT-based ones, the time-recursive architectures require only local communication. Also, they are modular and regular, thus they are very appropriate for VLSI implementation and they allow a high degree of parallelism. In this two-part paper, we establish an architectural framework for parallel time-recursive computation. We clonsider a class of linear operators that consists of the discrete time, time invariant, compactly supported, but otherwise arbitrary kernel functions. We show that the structure of the realization of a given linear operator is dictated by the decomposition of the latter with respect to proper basis functions. An optimal way for carrying out this decomposition is demonstrated. The parametric forms of the basis functions are identified and their properties pertinent to the architecture design are studied. A library of architectural building modules capable of realizing these functions is developed. An analysis of the implementatioin complexity for the aforementioned modules is conducted. Based on this framework, the time-recursive architecture of a given h e a r operator can be derived in a systematic routine way. Since 1991, he has been the Director of the Center for Satellite and Hybrid Communication Networks, a NASA Center for the Commercial Development of Space, which he co-founded. He has numerous publications in control and communication systems, and is the co-editor of Recent Progress in Stochastic Calculus (Spnnger-Verlag, 1990). His current research interests include stochastic systems and signal processing and understandmg with emphasis on speech and image signals, real-time architectures, symbolic computation, intelligent control systems, robust nonlinear control, dxtributed parameter systems, hybnd communication network simulahon and management.

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Section: A Lattice Architecture Design For Mapping Operatorsmentioning

confidence: 99%

Section: Implementing Sliding and Block Transformsmentioning

confidence: 99%

Section: Implementing Sliding and Block Transformsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Time-recursive computation and real-time parallel architectures: a framework

Frantzeskakis

Baras

Liu

1995

IEEE Trans. Signal Process.

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Optimal unified architectures for the real-time computation of time-recursive discrete sinusoidal transforms

Liu

Chiu

Kolagotla

et al. 1994

IEEE Trans. Circuits Syst. Video Technol.

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Abstract-An optimal unified architecture that can efficiently compute the Discrete Cosine, Sine, Hartley, Fourier, Lapped Orthogonal, and Complex Lapped transforms for a continuous stream of input data that arise in signallimage communications is proposed. This structure uses only half as many multipliers as the previous best known scheme [l]. The proposed architecture is regular, modular, and has only local interconnections in both data and control paths. There is no limitation on the transform size N and only 2N -2 multipliers are needed for the DCT.The throughput of this scheme is one input sample per clock cycle. We provide a theoretical justification by showing that any discrete transform whose basis functions satisfy the Fundamental Recurrence Formula has a second-order autoregressive structure in its filter realization. We also demonstrate that dual generation transform pairs share the same autoregressive structure. We extend these time-recursive concepts to multi-dimensional transforms. The resulting d-dimensional structures are fully-pipelined and consist of only d 1-D transform arrays and shift registers.

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Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transforms

Liu

Chiu

1993

IEEE Trans. Signal Process.

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VLSI implementation of real-time parallel DCT/DST lattice structures for video communications

Cited by 3 publications

References 8 publications

Time-recursive computation and real-time parallel architectures: a framework

Time-recursive computation and real-time parallel architectures: a framework

Optimal unified architectures for the real-time computation of time-recursive discrete sinusoidal transforms

Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transforms

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