Virtualizing and sharing reconfigurable resources in High-Performance Reconfigurable Computing systems

El-Araby, Esam; González, Iván; El‐Ghazawi, Tarek

doi:10.1109/hprcta.2008.4745683

Cited by 32 publications

(13 citation statements)

References 13 publications

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“…In the reconfigurable computing field, the existing hardware virtualization methods [El-Araby et al 2008;Kirischian et al 2010;Hofmann et al 2010;Gohringer et al 2011;Werner et al 2012;Garcia and Compton 2008;Sabeghi and Bertels 2009] either adopted the partial reconfiguration technique to support specific applications or proposed a virtualization layer that abstracted the hardware characteristics to increase the utilization of hardware resources. From the viewpoint of system management, the preceding hardware virtualization methods lack system flexibility and scalability compared to the OS4RS designs [So and Brodersen 2008;Donato et al 2005;Santambrogio et al 2008].…”

Section: Related Workmentioning

confidence: 99%

Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systems

Huang

Hsiung

2013

ACM Trans. Reconfigurable Technol. Syst.

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In most existing works, reconfigurable hardware modules are still managed as conventional hardware devices. Further, the software reconfiguration overhead incurred by loading corresponding device drivers into the kernel of an operating system has been overlooked until now. As a result, the enhancement of system performance and the utilization of reconfigurable hardware modules are still quite limited. This work proposes a virtualizable hardware/software design infrastructure (VDI) for dynamically partially reconfigurable systems. Besides the gate-level hardware virtualization provided by the partial reconfiguration technology, VDI supports the device-level hardware virtualization. In VDI, a reconfigurable hardware module can be virtualized such that it can be accessed efficiently by multiple applications in an interleaving way. A Hot-Plugin Connector (HPC) replaces the conventional device driver, such that it not only assists the device-level hardware virtualization but can also be reused across different hardware modules. To facilitate hardware/software communication and to enhance system scalability, the proposed VDI is realized as a hierarchical design framework. User-designed reconfigurable hardware modules can be easily integrated into VDI, and are then executed as hardware tasks in an operating system for reconfigurable systems (OS4RS). A dynamically partially reconfigurable network security system was designed using VDI, which demonstrated a higher utilization of reconfigurable hardware modules and a reduction by up to 12.83% of the processing time required by using the conventional method in a dynamically partially reconfigurable system.

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Section: Related Workmentioning

confidence: 99%

Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systems

Huang

Hsiung

2013

ACM Trans. Reconfigurable Technol. Syst.

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“…Similar FPGA work also includes the RAD architecture proposed by [35]. Our previous work [36] also uses the partial run-time reconfiguration feature of the FPGA, albeit for enabling efficient SPMD execution in HPC systems. This work partitions the FPGA into multiple regions, and allocates each region to a CPU core within the compute node.…”

Section: Related Workmentioning

confidence: 99%

GPU Resource Sharing and Virtualization on High Performance Computing Systems

Narayana

El-Araby

et al. 2011

2011 International Conference on Parallel Processing

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Modern Graphic Processing Units (GPUs) are widely used as application accelerators in the High Performance Computing (HPC) field due to their massive floating-point computational capabilities and highly dataparallel computing architecture. Contemporary high performance computers equipped with co-processors such as GPUs primarily execute parallel applications using the Single Program Multiple Data (SPMD) model, which requires balanced computing resources of both microprocessor and coprocessors to ensure full system utilization. While the inclusion of GPUs in HPC systems provides more computing resources and significant performance improvements, the asymmetrical distribution of the number of GPUs relative to the microprocessors can result in an underutilization of overall system computing resources. In this paper, we propose a GPU resource virtualization approach to allow underutilized microprocessors to share the GPUs. We analyze factors affecting the parallel execution performance on GPUs and conduct a theoretical performance estimation based on the most recent GPU architectures as well as the SPMD model. Then we present the implementation details of the virtualization infrastructure, followed by an experimental verification of the proposed concepts using an NVIDIA Fermi GPU computing node. The results demonstrate a considerable performance gain over the traditional SPMD execution without virtualization. Furthermore, the proposed solution enables full utilization of the asymmetrical system resources, through the sharing of the GPUs among microprocessors, while incurring low overheads due to the virtualization layer.

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“…The authors modified the vendor-supplied APIs with virtualisation APIs, which can be used by user processes to interact with the VCM. In comparison to the work presented in El-Araby et al (2008), pvFPGA moves a step forward to virtualise an FPGA accelerator for processes from different domains. We have proposed an accelerator design which can be used for accelerating various applications, regardless of the application computation latencies.…”

Section: Hyper-requesting Evaluationmentioning

confidence: 99%

“…Since 2007, many researchers (Dowty and Sugerman, 2009;Gupta et al, 2009;Shi et al, 2012;Giunta et al, 2010;Ravi et al, 2011;Lagar-Cavilla et al, 2007) have been focusing on making GPUs a shared resource within a virtualised environment, which would allow for adding GPUs to the infrastructure level of cloud computing. But the idea of adding FPGA accelerators to cloud computing (El-Araby et al, 2008;Gonzalez et al, 2012;Huang et al, 2010;Huang and Hsiung, 2013;Lübbers, 2010;Sabeghi and Bertels, 2009;Jain et al, 2014;Byma et al, 2014;Wang et al, 2013) still stays at an exploration stage.…”

Section: Introductionmentioning

confidence: 99%

pvFPGA: paravirtualising an FPGA-based hardware accelerator towards general purpose computing

Wang

Bolić

Parri

2017

IJHPCN

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This paper presents an ameliorated design of pvFPGA, which is a novel system design solution for virtualising an FPGA-based hardware accelerator by a virtual machine monitor (VMM). The accelerator design on the FPGA can be used for accelerating various applications, regardless of the application computation latencies. In the implementation, we adopt the Xen VMM to build a paravirtualised environment, and a Xilinx Virtex-6 as an FPGA accelerator. The data transferred between the x86 server and the FPGA accelerator through direct memory access (DMA), and a streaming pipeline technique is adopted to improve the efficiency of data transfer. Several solutions to solve streaming pipeline hazards are discussed in this paper. In addition, we propose a technique, hyper-requesting, which enables portions of two requests bidding to different accelerator applications to be processed on the FPGA accelerator simultaneously through DMA context switches, to achieve request level parallelism. The experimental results show that hyper-requesting reduces request turnaround time by up to 80%.Keywords: field-programmable gate array; FPGA; hardware accelerator; virtualisation; hyperrequesting; streaming pipeline; DMA context switch.Reference to this paper should be made as follows: Wang, W., Bolic, M. and Parri, J. (2017) 'pvFPGA: paravirtualising an FPGA-based hardware accelerator towards general purpose computing', Int.

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Virtualizing and sharing reconfigurable resources in High-Performance Reconfigurable Computing systems

Cited by 32 publications

References 13 publications

Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systems

Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systems

GPU Resource Sharing and Virtualization on High Performance Computing Systems

pvFPGA: paravirtualising an FPGA-based hardware accelerator towards general purpose computing

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