View from the Fringe of the Fringe

Johnson, Steven D.

doi:10.1007/3-540-44755-5_2

Cited by 2 publications

(2 citation statements)

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“…In contrast, proof assistants are essential to the verification of complex designs and the refinement processes advocated by Johnson [2001], and indeed Intel's Integrated Design and Validation (IDV) system appears to have successfully applied this methodology to their designs [Seger et al 2005;Grundy et al 2006], although perhaps not as ambitiously as to which Johnson aspired. Functional programming techniques underpin all large-scale verification efforts, such as the ARM processor models of Fox et al [2010] and the x86-compatible models of Hunt Jr. et al [2010].…”

Section: Discussionmentioning

confidence: 99%

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Synchronous digital circuits as functional programs

Gammie

2013

ACM Comput. Surv.

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Functional programming techniques have been used to describe synchronous digital circuits since the early 1980s. Here we survey the systems and formal underpinnings that constitute this tradition. We situate these techniques with respect to other formal methods for hardware design and discuss the work yet to be done.Hardware designs traverse a series of abstraction layers: what might begin as a highlevel behavioural model that addresses architectural issues will, when mature, typically be manually translated into a Register-Transfer Level (RTL) description that captures how the high-level computations are performed by the finite-state means of logic gates and memories. This is typically validated against the original model using simulation and testing, or more formally with model-checking techniques or a proof assistant. The resulting netlists (circuit schematics represented as graphs) are semiautomatically mapped to an implementation technology and laid out for realisation in silicon.The original motivation for developing Domain-Specific Languages (DSLs) [Mernik et al. 2005] for the upper reaches of this process was to harness the huge increases in transistor densities on silicon chips forecast by Moore's law [Mead and Conway 1980]. It was hoped that productivity would rise with the abstraction level, yielding designs that were more reusable, scalable, and correct. Traditional imperative programming languages were a poor fit, as their implicit sequentiality conflicts with the intrinsic parallelism of hardware, and a global store is in tension with the ideal of placing computations physically near the relevant state [Nikhil 2011]. For these reasons, I thank

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Section: Discussionmentioning

confidence: 99%

“…Johnson and his collaborators have made an extended investigation into the practical use of derivational reasoning in digital design [Johnson 1983;Johnson and Bose 1997;Johnson 2001]. Their goal is to provide tools to explore the space of implementations of a high-level behavioural specification.…”

Section: Hardware Synthesis From First-order Recursion Equationsmentioning

confidence: 99%