2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) 2013
DOI: 10.1109/reconfig.2013.6732337
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Video super resolution algorithm implemented on a low-cost NoC-based MPSoC platform

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Cited by 2 publications
(1 citation statement)
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“…ASIP is capable of performing many image processing algorithms using one data path. When compared to conventional RISC processor, ASIP works at 16 times higher rate and performs several ID filtering processing in 8cycle/pixel along with the advantage of achieving Full HD (1920x1080) application [3]. Interconnections in MPSoC are established by Network-on- Chip (NOC) to ensure high efficiency and scalability.…”
Section: Introductionmentioning
confidence: 99%
“…ASIP is capable of performing many image processing algorithms using one data path. When compared to conventional RISC processor, ASIP works at 16 times higher rate and performs several ID filtering processing in 8cycle/pixel along with the advantage of achieving Full HD (1920x1080) application [3]. Interconnections in MPSoC are established by Network-on- Chip (NOC) to ensure high efficiency and scalability.…”
Section: Introductionmentioning
confidence: 99%