Via Technologies for MEMS

Dixit, Pradeep; Henttinen, Kimmo

doi:10.1016/b978-0-323-29965-7.00038-5

Cited by 8 publications

(4 citation statements)

References 47 publications

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“…However, further development is still needed in this field to create optical components with greater suitability for blue and near-UV wavelengths and introducing such components to an industrial-scale process. Wafer stacking and TSVs, whilst nascent technologies, are becoming prevalent in many different modern devices, such as high-bandwidth memory [180], and is a well-understood process [181]. Cooling requirements will become increasingly important to consider when integrating different technologies.…”

Section: Discussionmentioning

confidence: 99%

“…SNSPDs may prove simpler to integrate as they can be fabricated as part of the ion trap, however, they have to be operated at superconducting temperatures. Wafer stacking and TSVs, whilst nascent technologies, are becoming prevalent in many different modern devices, such as high-bandwidth memory [165], and is a well-understood process [166]. However, in these industries, low yields are acceptable.…”

Section: Discussionmentioning

confidence: 99%

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Engineering of microfabricated ion traps and integration of advanced on-chip features

et al. 2020

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Section: Discussionmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Engineering of microfabricated ion traps and integration of advanced on-chip features

et al. 2020

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“…Laser drilling does not need a mask, machining speed can be up to 2000 µm/s [18], the via aspect ratios are as high as 70 [19], and it is a good option for MEMS industry. Hwoever, there are still some problems, as bulges around the holes influence further bonding and via metallization [20,21]. Applying the method of liquid-assisted laser processing (LALP) can reduce the temperature gradient and facilitate the debris ejection bulges.…”

Section: Introductionmentioning

confidence: 99%

Research on Wafer-Level MEMS Packaging with Through-Glass Vias

et al. 2018

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A MEMS fabrication process with through-glass vias (TGVs) by laser drilling was presented, and reliability concerns about MEMS packaging with TGV, likes debris and via metallization, were overcome. The via drilling process on Pyrex 7740 glasses was studied using a picosecond laser with a wavelength of 532 nm. TGVs were tapered, the minimum inlet diameter of via holes on 300 μm glasses was 90 μm, and the relative outlet diameter is 48 μm. It took about 9 h and 58 min for drilling 4874 via holes on a four-inch wafer. Debris in ablation was collected only on the laser inlet side, and the outlet side was clean enough for bonding. The glass with TGVs was anodically bonded to silicon structures of MEMS sensors for packaging, electron beam evaporated metal was used to cover the bottom, the side, and the surface of via holes for vertical electrical interconnections. The metal was directly contacted to silicon with low contact resistance. A MEMS gyroscope was made in this way, and the getter was used for vacuum maintenance. The vacuum degree maintained under 1 Pa for more than two years. The proposed MEMS fabrication flow with a simple process and low cost is very suitable for mass production in industry.

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“…In-Situ Doped Polysilicon (ISDP) is a semiconductor material in which the resistivity can be tailored with the doping level and material crystallinity and is therefore commonly used in microelectronics as for TSV First technology. 3,4 ISDP presents the advantages that it can be used as a bonding layer and an electrode at the same time. However, the asdeposited ISDP high surface roughness represents a significant challenge for direct bonding which needs surface roughness values in the range or below 0.6 nm RMS.…”

mentioning

confidence: 99%

In Situ Doped Polysilicon (ISDP) Hydrophilic Direct Wafer Bonding for MEMS Applications

Stricher

Gondcharton

Amnache

et al. 2021

ECS J. Solid State Sci. Technol.

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In this paper, Chemical Mechanical Polishing is used to reduce RMS roughness of as-deposited ISDP from 3.2 nm down to 0.18 nm. This surface preparation allows ISDP thin films to be direct bonded to polycrystalline and monocrystalline Si, as well as thermal SiO2. Mechanically strong bondings are obtained showing surface energies higher than the Si fracture energy of 2250 mJ.m−2 and adherence energy up to more than 6000 mJ.m−2 after annealing at 1100 °C. Infrared images and Scanning Acoustic Microscopy confirm that ISDP can be used to fabricate void-free assemblies after annealing. The hermeticity analysis of cavities sealed by ISDP direct bonding showed maximum leak rate lower than 10−11 Pa.m3s−1 after 18 weeks.

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Via Technologies for MEMS

Cited by 8 publications

References 47 publications

Engineering of microfabricated ion traps and integration of advanced on-chip features

Engineering of microfabricated ion traps and integration of advanced on-chip features

Research on Wafer-Level MEMS Packaging with Through-Glass Vias

In Situ Doped Polysilicon (ISDP) Hydrophilic Direct Wafer Bonding for MEMS Applications

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