VHDL-AMS design of a MOST model including deep submicron and thermal-electronic effects

Lallement, Christophe; Pêcheux, François; Hervé, Y.

doi:10.1109/bmas.2001.962503

Cited by 7 publications

(3 citation statements)

References 7 publications

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“…It is with such basic elements that VHDL-AMS provides optimal solutions to interconnect models of different domains, and the efficient modeling of MOEMS is almost within our grasp. For example, we have successfully instanciated the EKV electrical model as a constitutive part of an analog opto-electrical system involving a light emitting diode and a photodiode [6] (both devices are very sensitive to temperature).…”

Section: Resultsmentioning

confidence: 99%

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A VHDL-AMS Case Study

Lallement

Pêcheux

Hervé

2002

IFIP Advances in Information and Communication Technology

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Abstract:The paper presents an application of the VHDL-AMS formalism to state-ofthe-art MOST simulation models. We present the principles, techniques and tools used to achieve the incremental implementation of an analytical third generation Spice transistor MOST model named EKV in VHDL-AMS, with relevant parameters set to match a deep submicron technology (gate length = O.15IJm). The model includes the capacitances and resistors induced by the LDD structures as a function of gate voltage, and also considers thermo-electrical interactions between the transistor and its direct environment. Along with some considerations on the power of VHDL-AMS for modeling deep submicron devices, we give some examples of application of this innovative EKV MOS model.

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Section: Resultsmentioning

confidence: 99%

“…The VHDL-AMS analog solver is responsible for computing the values of the quantities such that the relationships hold (subject to tolerances), and the order of simultaneous statements does not matter. An example of VHDL-AMS implementation of a very simple EKV MOST model (case of a large n-MOST) can be found in [6].…”

Section: 1mentioning

confidence: 99%

A VHDL-AMS Case Study

Lallement

Pêcheux

Hervé

2002

IFIP Advances in Information and Communication Technology

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“…At the same time, it offers a way to substantially improve robustness of new compact device models. Implementation of the same model across different electrical circuit simulators is automated [7,8].…”

Section: Automatic Device Model Synthesizer Modelling Examplementioning

confidence: 99%

Standardization of the compact model coding: non-fully depleted SOI MOSFET example

Grabiński,

Lemaitre

2005

JTIT

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The initiative to standardize compact (SPICE-like) modelling has recently gained momentum in the semiconductor industry. Some of the important issues of the compact modelling must be addressed, such as accuracy, testing, availability, version control, verification and validation. Most compact models developed in the past did not account for these key issues which are of highest importance when introducing a new compact model to the semiconductor industry in particular going beyond the ITRS roadmap technological 100 nm node. An important application for non-fully depleted SOI technology is high performance microprocessors, other high speed logic chips, as well as analogue RF circuits. The IC design process requires a compact model that describes in detail the electrical characteristics of SOI MOSFET transistors. In this paper a non-fully depleted SOI MOSFET model and its Verilog-AMS description will be presented.

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VHDL-AMS and Verilog-AMS as Competitive Solutions

Pêcheux¹,

Lallement²

System Specification &Amp; Design Languages

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VHDL-AMS design of a MOST model including deep submicron and thermal-electronic effects

Cited by 7 publications

References 7 publications

A VHDL-AMS Case Study

A VHDL-AMS Case Study

Standardization of the compact model coding: non-fully depleted SOI MOSFET example

VHDL-AMS and Verilog-AMS as Competitive Solutions

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